| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner F1C100s USB PHY |
| |
| maintainers: |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| properties: |
| "#phy-cells": |
| const: 1 |
| |
| compatible: |
| const: allwinner,suniv-f1c100s-usb-phy |
| |
| reg: |
| maxItems: 1 |
| description: PHY Control registers |
| |
| reg-names: |
| const: phy_ctrl |
| |
| clocks: |
| maxItems: 1 |
| description: USB OTG PHY bus clock |
| |
| clock-names: |
| const: usb0_phy |
| |
| resets: |
| maxItems: 1 |
| description: USB OTG reset |
| |
| reset-names: |
| const: usb0_reset |
| |
| usb0_id_det-gpios: |
| maxItems: 1 |
| description: GPIO to the USB OTG ID pin |
| |
| usb0_vbus_det-gpios: |
| maxItems: 1 |
| description: GPIO to the USB OTG VBUS detect pin |
| |
| usb0_vbus_power-supply: |
| description: Power supply to detect the USB OTG VBUS |
| |
| usb0_vbus-supply: |
| description: Regulator controlling USB OTG VBUS |
| |
| required: |
| - "#phy-cells" |
| - compatible |
| - clocks |
| - clock-names |
| - reg |
| - reg-names |
| - resets |
| - reset-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/clock/suniv-ccu-f1c100s.h> |
| #include <dt-bindings/reset/suniv-ccu-f1c100s.h> |
| |
| phy@1c13400 { |
| compatible = "allwinner,suniv-f1c100s-usb-phy"; |
| reg = <0x01c13400 0x10>; |
| reg-names = "phy_ctrl"; |
| clocks = <&ccu CLK_USB_PHY0>; |
| clock-names = "usb0_phy"; |
| resets = <&ccu RST_USB_PHY0>; |
| reset-names = "usb0_reset"; |
| #phy-cells = <1>; |
| usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; |
| }; |
