| Qualcomm Hexagon Peripheral Image Loader |
| |
| This document defines the binding for a component that loads and boots firmware |
| on the Qualcomm Hexagon core. |
| |
| - compatible: |
| Usage: required |
| Value type: <string> |
| Definition: must be one of: |
| "qcom,ipq8074-wcss-pil" |
| "qcom,qcs404-wcss-pil" |
| |
| - reg: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: must specify the base address and size of the qdsp6 and |
| rmb register blocks |
| |
| - reg-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "q6dsp" and "rmb" |
| |
| - interrupts-extended: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: reference to the interrupts that match interrupt-names |
| |
| - interrupt-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" |
| |
| - clocks: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the clocks that match clock-names |
| |
| - clock-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: The clocks needed depend on the compatible string: |
| qcom,ipq8074-wcss-pil: |
| no clock names required |
| qcom,qcs404-wcss-pil: |
| must be "xo", "gcc_abhs_cbcr", "gcc_abhs_cbcr", |
| "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", |
| "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", |
| "lcc_axim_cbc", "lcc_bcr_sleep" |
| |
| - resets: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the list of 3 reset-controllers for the |
| wcss sub-system |
| |
| - reset-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" |
| for the wcss sub-system |
| |
| - memory-region: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to wcss reserved-memory region. |
| |
| For the compatible string below the following supplies are required: |
| "qcom,qcs404-wcss-pil" |
| - cx-supply: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the regulators to be held on behalf of the |
| booting of the Hexagon core |
| |
| - qcom,smem-states: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the smem state for requesting the Hexagon to |
| shut down |
| |
| - qcom,smem-state-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "stop" |
| |
| - qcom,halt-regs: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: a phandle reference to a syscon representing TCSR followed |
| by the three offsets within syscon for q6, wcss and nc |
| halt registers. |
| |
| - memory-region: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the reserved-memory for the region |
| |
| The Hexagon node may also have an subnode named either "smd-edge" or |
| "glink-edge" that describes the communication edge, channels and devices |
| related to the Hexagon. See ../soc/qcom/qcom,smd.yaml and |
| ../soc/qcom/qcom,glink.txt for details on how to describe these. |