| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: TI K3 DSP devices |
| |
| maintainers: |
| - Suman Anna <s-anna@ti.com> |
| |
| description: | |
| The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems |
| that are used to offload some of the processor-intensive tasks or algorithms, |
| for achieving various system level goals. |
| |
| These processor sub-systems usually contain additional sub-modules like |
| L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory |
| controller, a dedicated local power/sleep controller etc. The DSP processor |
| cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a |
| TMS320C71x CorePac processor. |
| |
| Each DSP Core sub-system is represented as a single DT node. Each node has a |
| number of required or optional properties that enable the OS running on the |
| host processor (Arm CorePac) to perform the device management of the remote |
| processor and to communicate with the remote processor. |
| |
| allOf: |
| - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# |
| |
| properties: |
| compatible: |
| enum: |
| - ti,am62a-c7xv-dsp |
| - ti,j721e-c66-dsp |
| - ti,j721e-c71-dsp |
| - ti,j721s2-c71-dsp |
| description: |
| Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs |
| Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs |
| Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs |
| Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs |
| |
| resets: |
| description: | |
| Should contain the phandle to the reset controller node managing the |
| local resets for this device, and a reset specifier. |
| maxItems: 1 |
| |
| firmware-name: |
| description: | |
| Should contain the name of the default firmware image |
| file located on the firmware search path |
| |
| mboxes: |
| description: | |
| OMAP Mailbox specifier denoting the sub-mailbox, to be used for |
| communication with the remote processor. This property should match |
| with the sub-mailbox node used in the firmware image. |
| maxItems: 1 |
| |
| memory-region: |
| minItems: 2 |
| maxItems: 8 |
| description: | |
| phandle to the reserved memory nodes to be associated with the remoteproc |
| device. There should be at least two reserved memory nodes defined. The |
| reserved memory nodes should be carveout nodes, and should be defined as |
| per the bindings in |
| Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
| items: |
| - description: region used for dynamic DMA allocations like vrings and |
| vring buffers |
| - description: region reserved for firmware image sections |
| additionalItems: true |
| |
| # Optional properties: |
| # -------------------- |
| |
| sram: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| minItems: 1 |
| maxItems: 4 |
| items: |
| maxItems: 1 |
| description: | |
| phandles to one or more reserved on-chip SRAM regions. The regions |
| should be defined as child nodes of the respective SRAM node, and |
| should be defined as per the generic bindings in, |
| Documentation/devicetree/bindings/sram/sram.yaml |
| |
| if: |
| properties: |
| compatible: |
| enum: |
| - ti,j721e-c66-dsp |
| then: |
| properties: |
| reg: |
| items: |
| - description: Address and Size of the L2 SRAM internal memory region |
| - description: Address and Size of the L1 PRAM internal memory region |
| - description: Address and Size of the L1 DRAM internal memory region |
| reg-names: |
| items: |
| - const: l2sram |
| - const: l1pram |
| - const: l1dram |
| else: |
| if: |
| properties: |
| compatible: |
| enum: |
| - ti,am62a-c7xv-dsp |
| - ti,j721e-c71-dsp |
| - ti,j721s2-c71-dsp |
| then: |
| properties: |
| reg: |
| items: |
| - description: Address and Size of the L2 SRAM internal memory region |
| - description: Address and Size of the L1 DRAM internal memory region |
| reg-names: |
| items: |
| - const: l2sram |
| - const: l1dram |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - ti,sci |
| - ti,sci-dev-id |
| - ti,sci-proc-ids |
| - resets |
| - firmware-name |
| - mboxes |
| - memory-region |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| mailbox0_cluster3: mailbox-0 { |
| #mbox-cells = <1>; |
| }; |
| |
| mailbox0_cluster4: mailbox-1 { |
| #mbox-cells = <1>; |
| }; |
| |
| bus@100000 { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ |
| <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ |
| <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ |
| <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ |
| |
| /* J721E C66_0 DSP node */ |
| dsp@4d80800000 { |
| compatible = "ti,j721e-c66-dsp"; |
| reg = <0x4d 0x80800000 0x00 0x00048000>, |
| <0x4d 0x80e00000 0x00 0x00008000>, |
| <0x4d 0x80f00000 0x00 0x00008000>; |
| reg-names = "l2sram", "l1pram", "l1dram"; |
| ti,sci = <&dmsc>; |
| ti,sci-dev-id = <142>; |
| ti,sci-proc-ids = <0x03 0xFF>; |
| resets = <&k3_reset 142 1>; |
| firmware-name = "j7-c66_0-fw"; |
| memory-region = <&c66_0_dma_memory_region>, |
| <&c66_0_memory_region>; |
| mboxes = <&mailbox0_cluster3 &mbox_c66_0>; |
| }; |
| |
| /* J721E C71_0 DSP node */ |
| c71_0: dsp@64800000 { |
| compatible = "ti,j721e-c71-dsp"; |
| reg = <0x00 0x64800000 0x00 0x00080000>, |
| <0x00 0x64e00000 0x00 0x0000c000>; |
| reg-names = "l2sram", "l1dram"; |
| ti,sci = <&dmsc>; |
| ti,sci-dev-id = <15>; |
| ti,sci-proc-ids = <0x30 0xFF>; |
| resets = <&k3_reset 15 1>; |
| firmware-name = "j7-c71_0-fw"; |
| memory-region = <&c71_0_dma_memory_region>, |
| <&c71_0_memory_region>; |
| mboxes = <&mailbox0_cluster4 &mbox_c71_0>; |
| }; |
| }; |
| }; |
