| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Mediatek Universal Flash Storage (UFS) Controller |
| |
| maintainers: |
| - Stanley Chu <stanley.chu@mediatek.com> |
| |
| allOf: |
| - $ref: ufs-common.yaml |
| |
| properties: |
| compatible: |
| enum: |
| - mediatek,mt8183-ufshci |
| - mediatek,mt8192-ufshci |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: ufs |
| |
| phys: |
| maxItems: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| vcc-supply: true |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - phys |
| - reg |
| - vcc-supply |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/mt8183-clk.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| ufs@ff3c0000 { |
| compatible = "mediatek,mt8183-ufshci"; |
| reg = <0 0x11270000 0 0x2300>; |
| interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>; |
| phys = <&ufsphy>; |
| |
| clocks = <&infracfg_ao CLK_INFRA_UFS>; |
| clock-names = "ufs"; |
| freq-table-hz = <0 0>; |
| |
| vcc-supply = <&mt_pmic_vemc_ldo_reg>; |
| }; |
| }; |