| commit | 423f042a65a2af82337af4e3c7f2cd828185e4f3 | [log] [tgz] |
|---|---|---|
| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | Wed Mar 11 16:41:14 2020 +0300 |
| committer | Stephen Boyd <sboyd@kernel.org> | Thu May 28 21:06:39 2020 -0700 |
| tree | 95d885366b94eed939670a5e2fa0599fe9ab8232 | |
| parent | 907f9291f937463c27e5ca9cb5f1d8eedf9a2738 [diff] |
CLK: HSDK: CGU: support PLL bypassing Support setting PLL to bypass mode to support output frequency equal to input one. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lkml.kernel.org/r/20200311134115.13257-3-Eugeniy.Paltsev@synopsys.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>