/* SPDX-License-Identifier: GPL-2.0-only */ | |
/* | |
* GPIO definitions for Amlogic Meson8 SoCs | |
* | |
* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> | |
*/ | |
#ifndef _DT_BINDINGS_MESON8_GPIO_H | |
#define _DT_BINDINGS_MESON8_GPIO_H | |
/* First GPIO chip */ | |
#define GPIOX_0 0 | |
#define GPIOX_1 1 | |
#define GPIOX_2 2 | |
#define GPIOX_3 3 | |
#define GPIOX_4 4 | |
#define GPIOX_5 5 | |
#define GPIOX_6 6 | |
#define GPIOX_7 7 | |
#define GPIOX_8 8 | |
#define GPIOX_9 9 | |
#define GPIOX_10 10 | |
#define GPIOX_11 11 | |
#define GPIOX_12 12 | |
#define GPIOX_13 13 | |
#define GPIOX_14 14 | |
#define GPIOX_15 15 | |
#define GPIOX_16 16 | |
#define GPIOX_17 17 | |
#define GPIOX_18 18 | |
#define GPIOX_19 19 | |
#define GPIOX_20 20 | |
#define GPIOX_21 21 | |
#define GPIOY_0 22 | |
#define GPIOY_1 23 | |
#define GPIOY_2 24 | |
#define GPIOY_3 25 | |
#define GPIOY_4 26 | |
#define GPIOY_5 27 | |
#define GPIOY_6 28 | |
#define GPIOY_7 29 | |
#define GPIOY_8 30 | |
#define GPIOY_9 31 | |
#define GPIOY_10 32 | |
#define GPIOY_11 33 | |
#define GPIOY_12 34 | |
#define GPIOY_13 35 | |
#define GPIOY_14 36 | |
#define GPIOY_15 37 | |
#define GPIOY_16 38 | |
#define GPIODV_0 39 | |
#define GPIODV_1 40 | |
#define GPIODV_2 41 | |
#define GPIODV_3 42 | |
#define GPIODV_4 43 | |
#define GPIODV_5 44 | |
#define GPIODV_6 45 | |
#define GPIODV_7 46 | |
#define GPIODV_8 47 | |
#define GPIODV_9 48 | |
#define GPIODV_10 49 | |
#define GPIODV_11 50 | |
#define GPIODV_12 51 | |
#define GPIODV_13 52 | |
#define GPIODV_14 53 | |
#define GPIODV_15 54 | |
#define GPIODV_16 55 | |
#define GPIODV_17 56 | |
#define GPIODV_18 57 | |
#define GPIODV_19 58 | |
#define GPIODV_20 59 | |
#define GPIODV_21 60 | |
#define GPIODV_22 61 | |
#define GPIODV_23 62 | |
#define GPIODV_24 63 | |
#define GPIODV_25 64 | |
#define GPIODV_26 65 | |
#define GPIODV_27 66 | |
#define GPIODV_28 67 | |
#define GPIODV_29 68 | |
#define GPIOH_0 69 | |
#define GPIOH_1 70 | |
#define GPIOH_2 71 | |
#define GPIOH_3 72 | |
#define GPIOH_4 73 | |
#define GPIOH_5 74 | |
#define GPIOH_6 75 | |
#define GPIOH_7 76 | |
#define GPIOH_8 77 | |
#define GPIOH_9 78 | |
#define GPIOZ_0 79 | |
#define GPIOZ_1 80 | |
#define GPIOZ_2 81 | |
#define GPIOZ_3 82 | |
#define GPIOZ_4 83 | |
#define GPIOZ_5 84 | |
#define GPIOZ_6 85 | |
#define GPIOZ_7 86 | |
#define GPIOZ_8 87 | |
#define GPIOZ_9 88 | |
#define GPIOZ_10 89 | |
#define GPIOZ_11 90 | |
#define GPIOZ_12 91 | |
#define GPIOZ_13 92 | |
#define GPIOZ_14 93 | |
#define CARD_0 94 | |
#define CARD_1 95 | |
#define CARD_2 96 | |
#define CARD_3 97 | |
#define CARD_4 98 | |
#define CARD_5 99 | |
#define CARD_6 100 | |
#define BOOT_0 101 | |
#define BOOT_1 102 | |
#define BOOT_2 103 | |
#define BOOT_3 104 | |
#define BOOT_4 105 | |
#define BOOT_5 106 | |
#define BOOT_6 107 | |
#define BOOT_7 108 | |
#define BOOT_8 109 | |
#define BOOT_9 110 | |
#define BOOT_10 111 | |
#define BOOT_11 112 | |
#define BOOT_12 113 | |
#define BOOT_13 114 | |
#define BOOT_14 115 | |
#define BOOT_15 116 | |
#define BOOT_16 117 | |
#define BOOT_17 118 | |
#define BOOT_18 119 | |
/* Second GPIO chip */ | |
#define GPIOAO_0 0 | |
#define GPIOAO_1 1 | |
#define GPIOAO_2 2 | |
#define GPIOAO_3 3 | |
#define GPIOAO_4 4 | |
#define GPIOAO_5 5 | |
#define GPIOAO_6 6 | |
#define GPIOAO_7 7 | |
#define GPIOAO_8 8 | |
#define GPIOAO_9 9 | |
#define GPIOAO_10 10 | |
#define GPIOAO_11 11 | |
#define GPIOAO_12 12 | |
#define GPIOAO_13 13 | |
#define GPIO_BSD_EN 14 | |
#define GPIO_TEST_N 15 | |
#endif /* _DT_BINDINGS_MESON8_GPIO_H */ |