| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| */ |
| |
| #ifndef QCOM_PHY_QMP_DP_PHY_V3_H_ |
| #define QCOM_PHY_QMP_DP_PHY_V3_H_ |
| |
| /* Only for QMP V3 PHY - DP PHY registers */ |
| #define QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK 0x048 |
| #define QSERDES_V3_DP_PHY_AUX_INTERRUPT_CLEAR 0x04c |
| #define QSERDES_V3_DP_PHY_AUX_BIST_CFG 0x050 |
| |
| #define QSERDES_V3_DP_PHY_VCO_DIV 0x064 |
| #define QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL 0x06c |
| #define QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL 0x088 |
| |
| #define QSERDES_V3_DP_PHY_SPARE0 0x0ac |
| #define QSERDES_V3_DP_PHY_STATUS 0x0c0 |
| |
| #endif |
