| /****************************************************************************** |
| * |
| * Name: actbl1.h - Additional ACPI table definitions |
| * |
| *****************************************************************************/ |
| |
| /* |
| * Copyright (C) 2000 - 2018, Intel Corp. |
| * All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * 1. Redistributions of source code must retain the above copyright |
| * notice, this list of conditions, and the following disclaimer, |
| * without modification. |
| * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
| * substantially similar to the "NO WARRANTY" disclaimer below |
| * ("Disclaimer") and any redistribution must be conditioned upon |
| * including a substantially similar Disclaimer requirement for further |
| * binary redistribution. |
| * 3. Neither the names of the above-listed copyright holders nor the names |
| * of any contributors may be used to endorse or promote products derived |
| * from this software without specific prior written permission. |
| * |
| * Alternatively, this software may be distributed under the terms of the |
| * GNU General Public License ("GPL") version 2 as published by the Free |
| * Software Foundation. |
| * |
| * NO WARRANTY |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR |
| * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
| * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGES. |
| */ |
| |
| #ifndef __ACTBL1_H__ |
| #define __ACTBL1_H__ |
| |
| /******************************************************************************* |
| * |
| * Additional ACPI Tables (1) |
| * |
| * These tables are not consumed directly by the ACPICA subsystem, but are |
| * included here to support device drivers and the AML disassembler. |
| * |
| * The tables in this file are fully defined within the ACPI specification. |
| * |
| ******************************************************************************/ |
| |
| /* |
| * Values for description table header signatures for tables defined in this |
| * file. Useful because they make it more difficult to inadvertently type in |
| * the wrong signature. |
| */ |
| #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ |
| #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ |
| #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ |
| #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ |
| #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ |
| #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ |
| #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ |
| #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ |
| #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ |
| #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ |
| #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ |
| #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ |
| #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ |
| #define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */ |
| #define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */ |
| #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ |
| |
| /* |
| * All tables must be byte-packed to match the ACPI specification, since |
| * the tables are provided by the system BIOS. |
| */ |
| #pragma pack(1) |
| |
| /* |
| * Note: C bitfields are not used for this reason: |
| * |
| * "Bitfields are great and easy to read, but unfortunately the C language |
| * does not specify the layout of bitfields in memory, which means they are |
| * essentially useless for dealing with packed data in on-disk formats or |
| * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, |
| * this decision was a design error in C. Ritchie could have picked an order |
| * and stuck with it." Norman Ramsey. |
| * See http://stackoverflow.com/a/1053662/41661 |
| */ |
| |
| /******************************************************************************* |
| * |
| * Common subtable headers |
| * |
| ******************************************************************************/ |
| |
| /* Generic subtable header (used in MADT, SRAT, etc.) */ |
| |
| struct acpi_subtable_header { |
| u8 type; |
| u8 length; |
| }; |
| |
| /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ |
| |
| struct acpi_whea_header { |
| u8 action; |
| u8 instruction; |
| u8 flags; |
| u8 reserved; |
| struct acpi_generic_address register_region; |
| u64 value; /* Value used with Read/Write register */ |
| u64 mask; /* Bitmask required for this register instruction */ |
| }; |
| |
| /******************************************************************************* |
| * |
| * BERT - Boot Error Record Table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_bert { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 region_length; /* Length of the boot error region */ |
| u64 address; /* Physical address of the error region */ |
| }; |
| |
| /* Boot Error Region (not a subtable, pointed to by Address field above) */ |
| |
| struct acpi_bert_region { |
| u32 block_status; /* Type of error information */ |
| u32 raw_data_offset; /* Offset to raw error data */ |
| u32 raw_data_length; /* Length of raw error data */ |
| u32 data_length; /* Length of generic error data */ |
| u32 error_severity; /* Severity code */ |
| }; |
| |
| /* Values for block_status flags above */ |
| |
| #define ACPI_BERT_UNCORRECTABLE (1) |
| #define ACPI_BERT_CORRECTABLE (1<<1) |
| #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) |
| #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) |
| #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ |
| |
| /* Values for error_severity above */ |
| |
| enum acpi_bert_error_severity { |
| ACPI_BERT_ERROR_CORRECTABLE = 0, |
| ACPI_BERT_ERROR_FATAL = 1, |
| ACPI_BERT_ERROR_CORRECTED = 2, |
| ACPI_BERT_ERROR_NONE = 3, |
| ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ |
| }; |
| |
| /* |
| * Note: The generic error data that follows the error_severity field above |
| * uses the struct acpi_hest_generic_data defined under the HEST table below |
| */ |
| |
| /******************************************************************************* |
| * |
| * CPEP - Corrected Platform Error Polling table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_cpep { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u64 reserved; |
| }; |
| |
| /* Subtable */ |
| |
| struct acpi_cpep_polling { |
| struct acpi_subtable_header header; |
| u8 id; /* Processor ID */ |
| u8 eid; /* Processor EID */ |
| u32 interval; /* Polling interval (msec) */ |
| }; |
| |
| /******************************************************************************* |
| * |
| * ECDT - Embedded Controller Boot Resources Table |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_ecdt { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| struct acpi_generic_address control; /* Address of EC command/status register */ |
| struct acpi_generic_address data; /* Address of EC data register */ |
| u32 uid; /* Unique ID - must be same as the EC _UID method */ |
| u8 gpe; /* The GPE for the EC */ |
| u8 id[1]; /* Full namepath of the EC in the ACPI namespace */ |
| }; |
| |
| /******************************************************************************* |
| * |
| * EINJ - Error Injection Table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_einj { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 header_length; |
| u8 flags; |
| u8 reserved[3]; |
| u32 entries; |
| }; |
| |
| /* EINJ Injection Instruction Entries (actions) */ |
| |
| struct acpi_einj_entry { |
| struct acpi_whea_header whea_header; /* Common header for WHEA tables */ |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_EINJ_PRESERVE (1) |
| |
| /* Values for Action field above */ |
| |
| enum acpi_einj_actions { |
| ACPI_EINJ_BEGIN_OPERATION = 0, |
| ACPI_EINJ_GET_TRIGGER_TABLE = 1, |
| ACPI_EINJ_SET_ERROR_TYPE = 2, |
| ACPI_EINJ_GET_ERROR_TYPE = 3, |
| ACPI_EINJ_END_OPERATION = 4, |
| ACPI_EINJ_EXECUTE_OPERATION = 5, |
| ACPI_EINJ_CHECK_BUSY_STATUS = 6, |
| ACPI_EINJ_GET_COMMAND_STATUS = 7, |
| ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, |
| ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, |
| ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ |
| ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ |
| }; |
| |
| /* Values for Instruction field above */ |
| |
| enum acpi_einj_instructions { |
| ACPI_EINJ_READ_REGISTER = 0, |
| ACPI_EINJ_READ_REGISTER_VALUE = 1, |
| ACPI_EINJ_WRITE_REGISTER = 2, |
| ACPI_EINJ_WRITE_REGISTER_VALUE = 3, |
| ACPI_EINJ_NOOP = 4, |
| ACPI_EINJ_FLUSH_CACHELINE = 5, |
| ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ |
| }; |
| |
| struct acpi_einj_error_type_with_addr { |
| u32 error_type; |
| u32 vendor_struct_offset; |
| u32 flags; |
| u32 apic_id; |
| u64 address; |
| u64 range; |
| u32 pcie_id; |
| }; |
| |
| struct acpi_einj_vendor { |
| u32 length; |
| u32 pcie_id; |
| u16 vendor_id; |
| u16 device_id; |
| u8 revision_id; |
| u8 reserved[3]; |
| }; |
| |
| /* EINJ Trigger Error Action Table */ |
| |
| struct acpi_einj_trigger { |
| u32 header_size; |
| u32 revision; |
| u32 table_size; |
| u32 entry_count; |
| }; |
| |
| /* Command status return values */ |
| |
| enum acpi_einj_command_status { |
| ACPI_EINJ_SUCCESS = 0, |
| ACPI_EINJ_FAILURE = 1, |
| ACPI_EINJ_INVALID_ACCESS = 2, |
| ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ |
| }; |
| |
| /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ |
| |
| #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) |
| #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) |
| #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) |
| #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) |
| #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) |
| #define ACPI_EINJ_MEMORY_FATAL (1<<5) |
| #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) |
| #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) |
| #define ACPI_EINJ_PCIX_FATAL (1<<8) |
| #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) |
| #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) |
| #define ACPI_EINJ_PLATFORM_FATAL (1<<11) |
| #define ACPI_EINJ_VENDOR_DEFINED (1<<31) |
| |
| /******************************************************************************* |
| * |
| * ERST - Error Record Serialization Table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_erst { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 header_length; |
| u32 reserved; |
| u32 entries; |
| }; |
| |
| /* ERST Serialization Entries (actions) */ |
| |
| struct acpi_erst_entry { |
| struct acpi_whea_header whea_header; /* Common header for WHEA tables */ |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_ERST_PRESERVE (1) |
| |
| /* Values for Action field above */ |
| |
| enum acpi_erst_actions { |
| ACPI_ERST_BEGIN_WRITE = 0, |
| ACPI_ERST_BEGIN_READ = 1, |
| ACPI_ERST_BEGIN_CLEAR = 2, |
| ACPI_ERST_END = 3, |
| ACPI_ERST_SET_RECORD_OFFSET = 4, |
| ACPI_ERST_EXECUTE_OPERATION = 5, |
| ACPI_ERST_CHECK_BUSY_STATUS = 6, |
| ACPI_ERST_GET_COMMAND_STATUS = 7, |
| ACPI_ERST_GET_RECORD_ID = 8, |
| ACPI_ERST_SET_RECORD_ID = 9, |
| ACPI_ERST_GET_RECORD_COUNT = 10, |
| ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, |
| ACPI_ERST_NOT_USED = 12, |
| ACPI_ERST_GET_ERROR_RANGE = 13, |
| ACPI_ERST_GET_ERROR_LENGTH = 14, |
| ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, |
| ACPI_ERST_EXECUTE_TIMINGS = 16, |
| ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ |
| }; |
| |
| /* Values for Instruction field above */ |
| |
| enum acpi_erst_instructions { |
| ACPI_ERST_READ_REGISTER = 0, |
| ACPI_ERST_READ_REGISTER_VALUE = 1, |
| ACPI_ERST_WRITE_REGISTER = 2, |
| ACPI_ERST_WRITE_REGISTER_VALUE = 3, |
| ACPI_ERST_NOOP = 4, |
| ACPI_ERST_LOAD_VAR1 = 5, |
| ACPI_ERST_LOAD_VAR2 = 6, |
| ACPI_ERST_STORE_VAR1 = 7, |
| ACPI_ERST_ADD = 8, |
| ACPI_ERST_SUBTRACT = 9, |
| ACPI_ERST_ADD_VALUE = 10, |
| ACPI_ERST_SUBTRACT_VALUE = 11, |
| ACPI_ERST_STALL = 12, |
| ACPI_ERST_STALL_WHILE_TRUE = 13, |
| ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, |
| ACPI_ERST_GOTO = 15, |
| ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, |
| ACPI_ERST_SET_DST_ADDRESS_BASE = 17, |
| ACPI_ERST_MOVE_DATA = 18, |
| ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ |
| }; |
| |
| /* Command status return values */ |
| |
| enum acpi_erst_command_status { |
| ACPI_ERST_SUCESS = 0, |
| ACPI_ERST_NO_SPACE = 1, |
| ACPI_ERST_NOT_AVAILABLE = 2, |
| ACPI_ERST_FAILURE = 3, |
| ACPI_ERST_RECORD_EMPTY = 4, |
| ACPI_ERST_NOT_FOUND = 5, |
| ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ |
| }; |
| |
| /* Error Record Serialization Information */ |
| |
| struct acpi_erst_info { |
| u16 signature; /* Should be "ER" */ |
| u8 data[48]; |
| }; |
| |
| /******************************************************************************* |
| * |
| * HEST - Hardware Error Source Table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_hest { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 error_source_count; |
| }; |
| |
| /* HEST subtable header */ |
| |
| struct acpi_hest_header { |
| u16 type; |
| u16 source_id; |
| }; |
| |
| /* Values for Type field above for subtables */ |
| |
| enum acpi_hest_types { |
| ACPI_HEST_TYPE_IA32_CHECK = 0, |
| ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, |
| ACPI_HEST_TYPE_IA32_NMI = 2, |
| ACPI_HEST_TYPE_NOT_USED3 = 3, |
| ACPI_HEST_TYPE_NOT_USED4 = 4, |
| ACPI_HEST_TYPE_NOT_USED5 = 5, |
| ACPI_HEST_TYPE_AER_ROOT_PORT = 6, |
| ACPI_HEST_TYPE_AER_ENDPOINT = 7, |
| ACPI_HEST_TYPE_AER_BRIDGE = 8, |
| ACPI_HEST_TYPE_GENERIC_ERROR = 9, |
| ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, |
| ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, |
| ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ |
| }; |
| |
| /* |
| * HEST substructures contained in subtables |
| */ |
| |
| /* |
| * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and |
| * struct acpi_hest_ia_corrected structures. |
| */ |
| struct acpi_hest_ia_error_bank { |
| u8 bank_number; |
| u8 clear_status_on_init; |
| u8 status_format; |
| u8 reserved; |
| u32 control_register; |
| u64 control_data; |
| u32 status_register; |
| u32 address_register; |
| u32 misc_register; |
| }; |
| |
| /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ |
| |
| struct acpi_hest_aer_common { |
| u16 reserved1; |
| u8 flags; |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| u32 bus; /* Bus and Segment numbers */ |
| u16 device; |
| u16 function; |
| u16 device_control; |
| u16 reserved2; |
| u32 uncorrectable_mask; |
| u32 uncorrectable_severity; |
| u32 correctable_mask; |
| u32 advanced_capabilities; |
| }; |
| |
| /* Masks for HEST Flags fields */ |
| |
| #define ACPI_HEST_FIRMWARE_FIRST (1) |
| #define ACPI_HEST_GLOBAL (1<<1) |
| #define ACPI_HEST_GHES_ASSIST (1<<2) |
| |
| /* |
| * Macros to access the bus/segment numbers in Bus field above: |
| * Bus number is encoded in bits 7:0 |
| * Segment number is encoded in bits 23:8 |
| */ |
| #define ACPI_HEST_BUS(bus) ((bus) & 0xFF) |
| #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF) |
| |
| /* Hardware Error Notification */ |
| |
| struct acpi_hest_notify { |
| u8 type; |
| u8 length; |
| u16 config_write_enable; |
| u32 poll_interval; |
| u32 vector; |
| u32 polling_threshold_value; |
| u32 polling_threshold_window; |
| u32 error_threshold_value; |
| u32 error_threshold_window; |
| }; |
| |
| /* Values for Notify Type field above */ |
| |
| enum acpi_hest_notify_types { |
| ACPI_HEST_NOTIFY_POLLED = 0, |
| ACPI_HEST_NOTIFY_EXTERNAL = 1, |
| ACPI_HEST_NOTIFY_LOCAL = 2, |
| ACPI_HEST_NOTIFY_SCI = 3, |
| ACPI_HEST_NOTIFY_NMI = 4, |
| ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ |
| ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ |
| ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ |
| ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ |
| ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ |
| ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ |
| ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ |
| ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ |
| }; |
| |
| /* Values for config_write_enable bitfield above */ |
| |
| #define ACPI_HEST_TYPE (1) |
| #define ACPI_HEST_POLL_INTERVAL (1<<1) |
| #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) |
| #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) |
| #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) |
| #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) |
| |
| /* |
| * HEST subtables |
| */ |
| |
| /* 0: IA32 Machine Check Exception */ |
| |
| struct acpi_hest_ia_machine_check { |
| struct acpi_hest_header header; |
| u16 reserved1; |
| u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| u64 global_capability_data; |
| u64 global_control_data; |
| u8 num_hardware_banks; |
| u8 reserved3[7]; |
| }; |
| |
| /* 1: IA32 Corrected Machine Check */ |
| |
| struct acpi_hest_ia_corrected { |
| struct acpi_hest_header header; |
| u16 reserved1; |
| u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| struct acpi_hest_notify notify; |
| u8 num_hardware_banks; |
| u8 reserved2[3]; |
| }; |
| |
| /* 2: IA32 Non-Maskable Interrupt */ |
| |
| struct acpi_hest_ia_nmi { |
| struct acpi_hest_header header; |
| u32 reserved; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| u32 max_raw_data_length; |
| }; |
| |
| /* 3,4,5: Not used */ |
| |
| /* 6: PCI Express Root Port AER */ |
| |
| struct acpi_hest_aer_root { |
| struct acpi_hest_header header; |
| struct acpi_hest_aer_common aer; |
| u32 root_error_command; |
| }; |
| |
| /* 7: PCI Express AER (AER Endpoint) */ |
| |
| struct acpi_hest_aer { |
| struct acpi_hest_header header; |
| struct acpi_hest_aer_common aer; |
| }; |
| |
| /* 8: PCI Express/PCI-X Bridge AER */ |
| |
| struct acpi_hest_aer_bridge { |
| struct acpi_hest_header header; |
| struct acpi_hest_aer_common aer; |
| u32 uncorrectable_mask2; |
| u32 uncorrectable_severity2; |
| u32 advanced_capabilities2; |
| }; |
| |
| /* 9: Generic Hardware Error Source */ |
| |
| struct acpi_hest_generic { |
| struct acpi_hest_header header; |
| u16 related_source_id; |
| u8 reserved; |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| u32 max_raw_data_length; |
| struct acpi_generic_address error_status_address; |
| struct acpi_hest_notify notify; |
| u32 error_block_length; |
| }; |
| |
| /* 10: Generic Hardware Error Source, version 2 */ |
| |
| struct acpi_hest_generic_v2 { |
| struct acpi_hest_header header; |
| u16 related_source_id; |
| u8 reserved; |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| u32 max_raw_data_length; |
| struct acpi_generic_address error_status_address; |
| struct acpi_hest_notify notify; |
| u32 error_block_length; |
| struct acpi_generic_address read_ack_register; |
| u64 read_ack_preserve; |
| u64 read_ack_write; |
| }; |
| |
| /* Generic Error Status block */ |
| |
| struct acpi_hest_generic_status { |
| u32 block_status; |
| u32 raw_data_offset; |
| u32 raw_data_length; |
| u32 data_length; |
| u32 error_severity; |
| }; |
| |
| /* Values for block_status flags above */ |
| |
| #define ACPI_HEST_UNCORRECTABLE (1) |
| #define ACPI_HEST_CORRECTABLE (1<<1) |
| #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) |
| #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) |
| #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ |
| |
| /* Generic Error Data entry */ |
| |
| struct acpi_hest_generic_data { |
| u8 section_type[16]; |
| u32 error_severity; |
| u16 revision; |
| u8 validation_bits; |
| u8 flags; |
| u32 error_data_length; |
| u8 fru_id[16]; |
| u8 fru_text[20]; |
| }; |
| |
| /* Extension for revision 0x0300 */ |
| |
| struct acpi_hest_generic_data_v300 { |
| u8 section_type[16]; |
| u32 error_severity; |
| u16 revision; |
| u8 validation_bits; |
| u8 flags; |
| u32 error_data_length; |
| u8 fru_id[16]; |
| u8 fru_text[20]; |
| u64 time_stamp; |
| }; |
| |
| /* Values for error_severity above */ |
| |
| #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 |
| #define ACPI_HEST_GEN_ERROR_FATAL 1 |
| #define ACPI_HEST_GEN_ERROR_CORRECTED 2 |
| #define ACPI_HEST_GEN_ERROR_NONE 3 |
| |
| /* Flags for validation_bits above */ |
| |
| #define ACPI_HEST_GEN_VALID_FRU_ID (1) |
| #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) |
| #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) |
| |
| /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ |
| |
| struct acpi_hest_ia_deferred_check { |
| struct acpi_hest_header header; |
| u16 reserved1; |
| u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ |
| u8 enabled; |
| u32 records_to_preallocate; |
| u32 max_sections_per_record; |
| struct acpi_hest_notify notify; |
| u8 num_hardware_banks; |
| u8 reserved2[3]; |
| }; |
| |
| /******************************************************************************* |
| * |
| * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_hmat { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 reserved; |
| }; |
| |
| /* Values for HMAT structure types */ |
| |
| enum acpi_hmat_type { |
| ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subystem address range */ |
| ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ |
| ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ |
| ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ |
| }; |
| |
| struct acpi_hmat_structure { |
| u16 type; |
| u16 reserved; |
| u32 length; |
| }; |
| |
| /* |
| * HMAT Structures, correspond to Type in struct acpi_hmat_structure |
| */ |
| |
| /* 0: Memory subystem address range */ |
| |
| struct acpi_hmat_address_range { |
| struct acpi_hmat_structure header; |
| u16 flags; |
| u16 reserved1; |
| u32 processor_PD; /* Processor proximity domain */ |
| u32 memory_PD; /* Memory proximity domain */ |
| u32 reserved2; |
| u64 physical_address_base; /* Physical address range base */ |
| u64 physical_address_length; /* Physical address range length */ |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */ |
| #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */ |
| #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ |
| |
| /* 1: System locality latency and bandwidth information */ |
| |
| struct acpi_hmat_locality { |
| struct acpi_hmat_structure header; |
| u8 flags; |
| u8 data_type; |
| u16 reserved1; |
| u32 number_of_initiator_Pds; |
| u32 number_of_target_Pds; |
| u32 reserved2; |
| u64 entry_base_unit; |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) |
| |
| /* Values for Memory Hierarchy flag */ |
| |
| #define ACPI_HMAT_MEMORY 0 |
| #define ACPI_HMAT_LAST_LEVEL_CACHE 1 |
| #define ACPI_HMAT_1ST_LEVEL_CACHE 2 |
| #define ACPI_HMAT_2ND_LEVEL_CACHE 3 |
| #define ACPI_HMAT_3RD_LEVEL_CACHE 4 |
| |
| /* Values for data_type field above */ |
| |
| #define ACPI_HMAT_ACCESS_LATENCY 0 |
| #define ACPI_HMAT_READ_LATENCY 1 |
| #define ACPI_HMAT_WRITE_LATENCY 2 |
| #define ACPI_HMAT_ACCESS_BANDWIDTH 3 |
| #define ACPI_HMAT_READ_BANDWIDTH 4 |
| #define ACPI_HMAT_WRITE_BANDWIDTH 5 |
| |
| /* 2: Memory side cache information */ |
| |
| struct acpi_hmat_cache { |
| struct acpi_hmat_structure header; |
| u32 memory_PD; |
| u32 reserved1; |
| u64 cache_size; |
| u32 cache_attributes; |
| u16 reserved2; |
| u16 number_of_SMBIOShandles; |
| }; |
| |
| /* Masks for cache_attributes field above */ |
| |
| #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) |
| #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) |
| #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) |
| #define ACPI_HMAT_WRITE_POLICY (0x0000F000) |
| #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) |
| |
| /* Values for cache associativity flag */ |
| |
| #define ACPI_HMAT_CA_NONE (0) |
| #define ACPI_HMAT_CA_DIRECT_MAPPED (1) |
| #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) |
| |
| /* Values for write policy flag */ |
| |
| #define ACPI_HMAT_CP_NONE (0) |
| #define ACPI_HMAT_CP_WB (1) |
| #define ACPI_HMAT_CP_WT (2) |
| |
| /******************************************************************************* |
| * |
| * MADT - Multiple APIC Description Table |
| * Version 3 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_madt { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 address; /* Physical address of local APIC */ |
| u32 flags; |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ |
| |
| /* Values for PCATCompat flag */ |
| |
| #define ACPI_MADT_DUAL_PIC 1 |
| #define ACPI_MADT_MULTIPLE_APIC 0 |
| |
| /* Values for MADT subtable type in struct acpi_subtable_header */ |
| |
| enum acpi_madt_type { |
| ACPI_MADT_TYPE_LOCAL_APIC = 0, |
| ACPI_MADT_TYPE_IO_APIC = 1, |
| ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, |
| ACPI_MADT_TYPE_NMI_SOURCE = 3, |
| ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, |
| ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, |
| ACPI_MADT_TYPE_IO_SAPIC = 6, |
| ACPI_MADT_TYPE_LOCAL_SAPIC = 7, |
| ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, |
| ACPI_MADT_TYPE_LOCAL_X2APIC = 9, |
| ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, |
| ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, |
| ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, |
| ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, |
| ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, |
| ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, |
| ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ |
| }; |
| |
| /* |
| * MADT Subtables, correspond to Type in struct acpi_subtable_header |
| */ |
| |
| /* 0: Processor Local APIC */ |
| |
| struct acpi_madt_local_apic { |
| struct acpi_subtable_header header; |
| u8 processor_id; /* ACPI processor id */ |
| u8 id; /* Processor's local APIC id */ |
| u32 lapic_flags; |
| }; |
| |
| /* 1: IO APIC */ |
| |
| struct acpi_madt_io_apic { |
| struct acpi_subtable_header header; |
| u8 id; /* I/O APIC ID */ |
| u8 reserved; /* reserved - must be zero */ |
| u32 address; /* APIC physical address */ |
| u32 global_irq_base; /* Global system interrupt where INTI lines start */ |
| }; |
| |
| /* 2: Interrupt Override */ |
| |
| struct acpi_madt_interrupt_override { |
| struct acpi_subtable_header header; |
| u8 bus; /* 0 - ISA */ |
| u8 source_irq; /* Interrupt source (IRQ) */ |
| u32 global_irq; /* Global system interrupt */ |
| u16 inti_flags; |
| }; |
| |
| /* 3: NMI Source */ |
| |
| struct acpi_madt_nmi_source { |
| struct acpi_subtable_header header; |
| u16 inti_flags; |
| u32 global_irq; /* Global system interrupt */ |
| }; |
| |
| /* 4: Local APIC NMI */ |
| |
| struct acpi_madt_local_apic_nmi { |
| struct acpi_subtable_header header; |
| u8 processor_id; /* ACPI processor id */ |
| u16 inti_flags; |
| u8 lint; /* LINTn to which NMI is connected */ |
| }; |
| |
| /* 5: Address Override */ |
| |
| struct acpi_madt_local_apic_override { |
| struct acpi_subtable_header header; |
| u16 reserved; /* Reserved, must be zero */ |
| u64 address; /* APIC physical address */ |
| }; |
| |
| /* 6: I/O Sapic */ |
| |
| struct acpi_madt_io_sapic { |
| struct acpi_subtable_header header; |
| u8 id; /* I/O SAPIC ID */ |
| u8 reserved; /* Reserved, must be zero */ |
| u32 global_irq_base; /* Global interrupt for SAPIC start */ |
| u64 address; /* SAPIC physical address */ |
| }; |
| |
| /* 7: Local Sapic */ |
| |
| struct acpi_madt_local_sapic { |
| struct acpi_subtable_header header; |
| u8 processor_id; /* ACPI processor id */ |
| u8 id; /* SAPIC ID */ |
| u8 eid; /* SAPIC EID */ |
| u8 reserved[3]; /* Reserved, must be zero */ |
| u32 lapic_flags; |
| u32 uid; /* Numeric UID - ACPI 3.0 */ |
| char uid_string[1]; /* String UID - ACPI 3.0 */ |
| }; |
| |
| /* 8: Platform Interrupt Source */ |
| |
| struct acpi_madt_interrupt_source { |
| struct acpi_subtable_header header; |
| u16 inti_flags; |
| u8 type; /* 1=PMI, 2=INIT, 3=corrected */ |
| u8 id; /* Processor ID */ |
| u8 eid; /* Processor EID */ |
| u8 io_sapic_vector; /* Vector value for PMI interrupts */ |
| u32 global_irq; /* Global system interrupt */ |
| u32 flags; /* Interrupt Source Flags */ |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_MADT_CPEI_OVERRIDE (1) |
| |
| /* 9: Processor Local X2APIC (ACPI 4.0) */ |
| |
| struct acpi_madt_local_x2apic { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u32 local_apic_id; /* Processor x2APIC ID */ |
| u32 lapic_flags; |
| u32 uid; /* ACPI processor UID */ |
| }; |
| |
| /* 10: Local X2APIC NMI (ACPI 4.0) */ |
| |
| struct acpi_madt_local_x2apic_nmi { |
| struct acpi_subtable_header header; |
| u16 inti_flags; |
| u32 uid; /* ACPI processor UID */ |
| u8 lint; /* LINTn to which NMI is connected */ |
| u8 reserved[3]; /* reserved - must be zero */ |
| }; |
| |
| /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ |
| |
| struct acpi_madt_generic_interrupt { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u32 cpu_interface_number; |
| u32 uid; |
| u32 flags; |
| u32 parking_version; |
| u32 performance_interrupt; |
| u64 parked_address; |
| u64 base_address; |
| u64 gicv_base_address; |
| u64 gich_base_address; |
| u32 vgic_interrupt; |
| u64 gicr_base_address; |
| u64 arm_mpidr; |
| u8 efficiency_class; |
| u8 reserved2[3]; |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| /* ACPI_MADT_ENABLED (1) Processor is usable if set */ |
| #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ |
| #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ |
| |
| /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ |
| |
| struct acpi_madt_generic_distributor { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u32 gic_id; |
| u64 base_address; |
| u32 global_irq_base; |
| u8 version; |
| u8 reserved2[3]; /* reserved - must be zero */ |
| }; |
| |
| /* Values for Version field above */ |
| |
| enum acpi_madt_gic_version { |
| ACPI_MADT_GIC_VERSION_NONE = 0, |
| ACPI_MADT_GIC_VERSION_V1 = 1, |
| ACPI_MADT_GIC_VERSION_V2 = 2, |
| ACPI_MADT_GIC_VERSION_V3 = 3, |
| ACPI_MADT_GIC_VERSION_V4 = 4, |
| ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ |
| }; |
| |
| /* 13: Generic MSI Frame (ACPI 5.1) */ |
| |
| struct acpi_madt_generic_msi_frame { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u32 msi_frame_id; |
| u64 base_address; |
| u32 flags; |
| u16 spi_count; |
| u16 spi_base; |
| }; |
| |
| /* Masks for Flags field above */ |
| |
| #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) |
| |
| /* 14: Generic Redistributor (ACPI 5.1) */ |
| |
| struct acpi_madt_generic_redistributor { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u64 base_address; |
| u32 length; |
| }; |
| |
| /* 15: Generic Translator (ACPI 6.0) */ |
| |
| struct acpi_madt_generic_translator { |
| struct acpi_subtable_header header; |
| u16 reserved; /* reserved - must be zero */ |
| u32 translation_id; |
| u64 base_address; |
| u32 reserved2; |
| }; |
| |
| /* |
| * Common flags fields for MADT subtables |
| */ |
| |
| /* MADT Local APIC flags */ |
| |
| #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ |
| |
| /* MADT MPS INTI flags (inti_flags) */ |
| |
| #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ |
| #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ |
| |
| /* Values for MPS INTI flags */ |
| |
| #define ACPI_MADT_POLARITY_CONFORMS 0 |
| #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 |
| #define ACPI_MADT_POLARITY_RESERVED 2 |
| #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 |
| |
| #define ACPI_MADT_TRIGGER_CONFORMS (0) |
| #define ACPI_MADT_TRIGGER_EDGE (1<<2) |
| #define ACPI_MADT_TRIGGER_RESERVED (2<<2) |
| #define ACPI_MADT_TRIGGER_LEVEL (3<<2) |
| |
| /******************************************************************************* |
| * |
| * MSCT - Maximum System Characteristics Table (ACPI 4.0) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_msct { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 proximity_offset; /* Location of proximity info struct(s) */ |
| u32 max_proximity_domains; /* Max number of proximity domains */ |
| u32 max_clock_domains; /* Max number of clock domains */ |
| u64 max_address; /* Max physical address in system */ |
| }; |
| |
| /* subtable - Maximum Proximity Domain Information. Version 1 */ |
| |
| struct acpi_msct_proximity { |
| u8 revision; |
| u8 length; |
| u32 range_start; /* Start of domain range */ |
| u32 range_end; /* End of domain range */ |
| u32 processor_capacity; |
| u64 memory_capacity; /* In bytes */ |
| }; |
| |
| /******************************************************************************* |
| * |
| * NFIT - NVDIMM Interface Table (ACPI 6.0+) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_nfit { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 reserved; /* Reserved, must be zero */ |
| }; |
| |
| /* Subtable header for NFIT */ |
| |
| struct acpi_nfit_header { |
| u16 type; |
| u16 length; |
| }; |
| |
| /* Values for subtable type in struct acpi_nfit_header */ |
| |
| enum acpi_nfit_type { |
| ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, |
| ACPI_NFIT_TYPE_MEMORY_MAP = 1, |
| ACPI_NFIT_TYPE_INTERLEAVE = 2, |
| ACPI_NFIT_TYPE_SMBIOS = 3, |
| ACPI_NFIT_TYPE_CONTROL_REGION = 4, |
| ACPI_NFIT_TYPE_DATA_REGION = 5, |
| ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, |
| ACPI_NFIT_TYPE_CAPABILITIES = 7, |
| ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ |
| }; |
| |
| /* |
| * NFIT Subtables |
| */ |
| |
| /* 0: System Physical Address Range Structure */ |
| |
| struct acpi_nfit_system_address { |
| struct acpi_nfit_header header; |
| u16 range_index; |
| u16 flags; |
| u32 reserved; /* Reserved, must be zero */ |
| u32 proximity_domain; |
| u8 range_guid[16]; |
| u64 address; |
| u64 length; |
| u64 memory_mapping; |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ |
| #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ |
| |
| /* Range Type GUIDs appear in the include/acuuid.h file */ |
| |
| /* 1: Memory Device to System Address Range Map Structure */ |
| |
| struct acpi_nfit_memory_map { |
| struct acpi_nfit_header header; |
| u32 device_handle; |
| u16 physical_id; |
| u16 region_id; |
| u16 range_index; |
| u16 region_index; |
| u64 region_size; |
| u64 region_offset; |
| u64 address; |
| u16 interleave_index; |
| u16 interleave_ways; |
| u16 flags; |
| u16 reserved; /* Reserved, must be zero */ |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ |
| #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ |
| #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ |
| #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ |
| #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ |
| #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ |
| #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ |
| |
| /* 2: Interleave Structure */ |
| |
| struct acpi_nfit_interleave { |
| struct acpi_nfit_header header; |
| u16 interleave_index; |
| u16 reserved; /* Reserved, must be zero */ |
| u32 line_count; |
| u32 line_size; |
| u32 line_offset[1]; /* Variable length */ |
| }; |
| |
| /* 3: SMBIOS Management Information Structure */ |
| |
| struct acpi_nfit_smbios { |
| struct acpi_nfit_header header; |
| u32 reserved; /* Reserved, must be zero */ |
| u8 data[1]; /* Variable length */ |
| }; |
| |
| /* 4: NVDIMM Control Region Structure */ |
| |
| struct acpi_nfit_control_region { |
| struct acpi_nfit_header header; |
| u16 region_index; |
| u16 vendor_id; |
| u16 device_id; |
| u16 revision_id; |
| u16 subsystem_vendor_id; |
| u16 subsystem_device_id; |
| u16 subsystem_revision_id; |
| u8 valid_fields; |
| u8 manufacturing_location; |
| u16 manufacturing_date; |
| u8 reserved[2]; /* Reserved, must be zero */ |
| u32 serial_number; |
| u16 code; |
| u16 windows; |
| u64 window_size; |
| u64 command_offset; |
| u64 command_size; |
| u64 status_offset; |
| u64 status_size; |
| u16 flags; |
| u8 reserved1[6]; /* Reserved, must be zero */ |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ |
| |
| /* valid_fields bits */ |
| |
| #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ |
| |
| /* 5: NVDIMM Block Data Window Region Structure */ |
| |
| struct acpi_nfit_data_region { |
| struct acpi_nfit_header header; |
| u16 region_index; |
| u16 windows; |
| u64 offset; |
| u64 size; |
| u64 capacity; |
| u64 start_address; |
| }; |
| |
| /* 6: Flush Hint Address Structure */ |
| |
| struct acpi_nfit_flush_address { |
| struct acpi_nfit_header header; |
| u32 device_handle; |
| u16 hint_count; |
| u8 reserved[6]; /* Reserved, must be zero */ |
| u64 hint_address[1]; /* Variable length */ |
| }; |
| |
| /* 7: Platform Capabilities Structure */ |
| |
| struct acpi_nfit_capabilities { |
| struct acpi_nfit_header header; |
| u8 highest_capability; |
| u8 reserved[3]; /* Reserved, must be zero */ |
| u32 capabilities; |
| u32 reserved2; |
| }; |
| |
| /* Capabilities Flags */ |
| |
| #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ |
| #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ |
| #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ |
| |
| /* |
| * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM |
| */ |
| struct nfit_device_handle { |
| u32 handle; |
| }; |
| |
| /* Device handle construction and extraction macros */ |
| |
| #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F |
| #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 |
| #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 |
| #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 |
| #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 |
| |
| #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 |
| #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 |
| #define ACPI_NFIT_MEMORY_ID_OFFSET 8 |
| #define ACPI_NFIT_SOCKET_ID_OFFSET 12 |
| #define ACPI_NFIT_NODE_ID_OFFSET 16 |
| |
| /* Macro to construct a NFIT/NVDIMM device handle */ |
| |
| #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ |
| ((dimm) | \ |
| ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ |
| ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ |
| ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ |
| ((node) << ACPI_NFIT_NODE_ID_OFFSET)) |
| |
| /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ |
| |
| #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ |
| ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) |
| |
| #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ |
| (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) |
| |
| #define ACPI_NFIT_GET_MEMORY_ID(handle) \ |
| (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) |
| |
| #define ACPI_NFIT_GET_SOCKET_ID(handle) \ |
| (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) |
| |
| #define ACPI_NFIT_GET_NODE_ID(handle) \ |
| (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) |
| |
| /******************************************************************************* |
| * |
| * PDTT - Platform Debug Trigger Table (ACPI 6.2) |
| * Version 0 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_pdtt { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u8 trigger_count; |
| u8 reserved[3]; |
| u32 array_offset; |
| }; |
| |
| /* |
| * PDTT Communication Channel Identifier Structure. |
| * The number of these structures is defined by trigger_count above, |
| * starting at array_offset. |
| */ |
| struct acpi_pdtt_channel { |
| u8 subchannel_id; |
| u8 flags; |
| }; |
| |
| /* Flags for above */ |
| |
| #define ACPI_PDTT_RUNTIME_TRIGGER (1) |
| #define ACPI_PDTT_WAIT_COMPLETION (1<<1) |
| |
| /******************************************************************************* |
| * |
| * PPTT - Processor Properties Topology Table (ACPI 6.2) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_pptt { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| }; |
| |
| /* Values for Type field above */ |
| |
| enum acpi_pptt_type { |
| ACPI_PPTT_TYPE_PROCESSOR = 0, |
| ACPI_PPTT_TYPE_CACHE = 1, |
| ACPI_PPTT_TYPE_ID = 2, |
| ACPI_PPTT_TYPE_RESERVED = 3 |
| }; |
| |
| /* 0: Processor Hierarchy Node Structure */ |
| |
| struct acpi_pptt_processor { |
| struct acpi_subtable_header header; |
| u16 reserved; |
| u32 flags; |
| u32 parent; |
| u32 acpi_processor_id; |
| u32 number_of_priv_resources; |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ |
| #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ |
| |
| /* 1: Cache Type Structure */ |
| |
| struct acpi_pptt_cache { |
| struct acpi_subtable_header header; |
| u16 reserved; |
| u32 flags; |
| u32 next_level_of_cache; |
| u32 size; |
| u32 number_of_sets; |
| u8 associativity; |
| u8 attributes; |
| u16 line_size; |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ |
| #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ |
| #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ |
| #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ |
| #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ |
| #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ |
| #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ |
| |
| /* Masks for Attributes */ |
| |
| #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ |
| #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ |
| #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ |
| |
| /* Attributes describing cache */ |
| #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ |
| #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ |
| #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ |
| #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ |
| |
| #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ |
| #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ |
| #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ |
| #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ |
| |
| #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ |
| #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ |
| |
| /* 2: ID Structure */ |
| |
| struct acpi_pptt_id { |
| struct acpi_subtable_header header; |
| u16 reserved; |
| u32 vendor_id; |
| u64 level1_id; |
| u64 level2_id; |
| u16 major_rev; |
| u16 minor_rev; |
| u16 spin_rev; |
| }; |
| |
| /******************************************************************************* |
| * |
| * SBST - Smart Battery Specification Table |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_sbst { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 warning_level; |
| u32 low_level; |
| u32 critical_level; |
| }; |
| |
| /******************************************************************************* |
| * |
| * SDEV - Secure Devices Table (ACPI 6.2) |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_sdev { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| }; |
| |
| struct acpi_sdev_header { |
| u8 type; |
| u8 flags; |
| u16 length; |
| }; |
| |
| /* Values for subtable type above */ |
| |
| enum acpi_sdev_type { |
| ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, |
| ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, |
| ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ |
| }; |
| |
| /* Values for flags above */ |
| |
| #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) |
| |
| /* |
| * SDEV subtables |
| */ |
| |
| /* 0: Namespace Device Based Secure Device Structure */ |
| |
| struct acpi_sdev_namespace { |
| struct acpi_sdev_header header; |
| u16 device_id_offset; |
| u16 device_id_length; |
| u16 vendor_data_offset; |
| u16 vendor_data_length; |
| }; |
| |
| /* 1: PCIe Endpoint Device Based Device Structure */ |
| |
| struct acpi_sdev_pcie { |
| struct acpi_sdev_header header; |
| u16 segment; |
| u16 start_bus; |
| u16 path_offset; |
| u16 path_length; |
| u16 vendor_data_offset; |
| u16 vendor_data_length; |
| }; |
| |
| /* 1a: PCIe Endpoint path entry */ |
| |
| struct acpi_sdev_pcie_path { |
| u8 device; |
| u8 function; |
| }; |
| |
| /******************************************************************************* |
| * |
| * SLIT - System Locality Distance Information Table |
| * Version 1 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_slit { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u64 locality_count; |
| u8 entry[1]; /* Real size = localities^2 */ |
| }; |
| |
| /******************************************************************************* |
| * |
| * SRAT - System Resource Affinity Table |
| * Version 3 |
| * |
| ******************************************************************************/ |
| |
| struct acpi_table_srat { |
| struct acpi_table_header header; /* Common ACPI table header */ |
| u32 table_revision; /* Must be value '1' */ |
| u64 reserved; /* Reserved, must be zero */ |
| }; |
| |
| /* Values for subtable type in struct acpi_subtable_header */ |
| |
| enum acpi_srat_type { |
| ACPI_SRAT_TYPE_CPU_AFFINITY = 0, |
| ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1, |
| ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY = 2, |
| ACPI_SRAT_TYPE_GICC_AFFINITY = 3, |
| ACPI_SRAT_TYPE_GIC_ITS_AFFINITY = 4, /* ACPI 6.2 */ |
| ACPI_SRAT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ |
| }; |
| |
| /* |
| * SRAT Subtables, correspond to Type in struct acpi_subtable_header |
| */ |
| |
| /* 0: Processor Local APIC/SAPIC Affinity */ |
| |
| struct acpi_srat_cpu_affinity { |
| struct acpi_subtable_header header; |
| u8 proximity_domain_lo; |
| u8 apic_id; |
| u32 flags; |
| u8 local_sapic_eid; |
| u8 proximity_domain_hi[3]; |
| u32 clock_domain; |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_SRAT_CPU_USE_AFFINITY (1) /* 00: Use affinity structure */ |
| |
| /* 1: Memory Affinity */ |
| |
| struct acpi_srat_mem_affinity { |
| struct acpi_subtable_header header; |
| u32 proximity_domain; |
| u16 reserved; /* Reserved, must be zero */ |
| u64 base_address; |
| u64 length; |
| u32 reserved1; |
| u32 flags; |
| u64 reserved2; /* Reserved, must be zero */ |
| }; |
| |
| /* Flags */ |
| |
| #define ACPI_SRAT_MEM_ENABLED (1) /* 00: Use affinity structure */ |
| #define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1) /* 01: Memory region is hot pluggable */ |
| #define ACPI_SRAT_MEM_NON_VOLATILE (1<<2) /* 02: Memory region is non-volatile */ |
| |
| /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ |
| |
| struct acpi_srat_x2apic_cpu_affinity { |
| struct acpi_subtable_header header; |
| u16 reserved; /* Reserved, must be zero */ |
| u32 proximity_domain; |
| u32 apic_id; |
| u32 flags; |
| u32 clock_domain; |
| u32 reserved2; |
| }; |
| |
| /* Flags for struct acpi_srat_cpu_affinity and struct acpi_srat_x2apic_cpu_affinity */ |
| |
| #define ACPI_SRAT_CPU_ENABLED (1) /* 00: Use affinity structure */ |
| |
| /* 3: GICC Affinity (ACPI 5.1) */ |
| |
| struct acpi_srat_gicc_affinity { |
| struct acpi_subtable_header header; |
| u32 proximity_domain; |
| u32 acpi_processor_uid; |
| u32 flags; |
| u32 clock_domain; |
| }; |
| |
| /* Flags for struct acpi_srat_gicc_affinity */ |
| |
| #define ACPI_SRAT_GICC_ENABLED (1) /* 00: Use affinity structure */ |
| |
| /* 4: GCC ITS Affinity (ACPI 6.2) */ |
| |
| struct acpi_srat_gic_its_affinity { |
| struct acpi_subtable_header header; |
| u32 proximity_domain; |
| u16 reserved; |
| u32 its_id; |
| }; |
| |
| /* Reset to default packing */ |
| |
| #pragma pack() |
| |
| #endif /* __ACTBL1_H__ */ |