| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/net/dsa/microchip,lan937x.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: LAN937x Ethernet Switch Series |
| |
| maintainers: |
| - UNGLinuxDriver@microchip.com |
| |
| allOf: |
| - $ref: dsa.yaml#/$defs/ethernet-ports |
| |
| properties: |
| compatible: |
| enum: |
| - microchip,lan9370 |
| - microchip,lan9371 |
| - microchip,lan9372 |
| - microchip,lan9373 |
| - microchip,lan9374 |
| |
| reg: |
| maxItems: 1 |
| |
| spi-max-frequency: |
| maximum: 50000000 |
| |
| reset-gpios: |
| description: Optional gpio specifier for a reset line |
| maxItems: 1 |
| |
| mdio: |
| $ref: /schemas/net/mdio.yaml# |
| unevaluatedProperties: false |
| |
| patternProperties: |
| "^(ethernet-)?ports$": |
| additionalProperties: true |
| patternProperties: |
| "^(ethernet-)?port@[0-7]$": |
| allOf: |
| - if: |
| properties: |
| phy-mode: |
| contains: |
| enum: |
| - rgmii |
| - rgmii-id |
| - rgmii-txid |
| - rgmii-rxid |
| then: |
| properties: |
| rx-internal-delay-ps: |
| enum: [0, 2000] |
| default: 0 |
| tx-internal-delay-ps: |
| enum: [0, 2000] |
| default: 0 |
| |
| required: |
| - compatible |
| - reg |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/gpio/gpio.h> |
| |
| macb0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| }; |
| |
| spi { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| lan9374: switch@0 { |
| compatible = "microchip,lan9374"; |
| reg = <0>; |
| spi-max-frequency = <44000000>; |
| |
| ethernet-ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| label = "lan1"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy0>; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| label = "lan2"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy1>; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| label = "lan4"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy2>; |
| }; |
| |
| port@3 { |
| reg = <3>; |
| label = "lan6"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy3>; |
| }; |
| |
| port@4 { |
| reg = <4>; |
| phy-mode = "rgmii"; |
| tx-internal-delay-ps = <2000>; |
| rx-internal-delay-ps = <2000>; |
| ethernet = <&macb0>; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| }; |
| |
| port@5 { |
| reg = <5>; |
| label = "lan7"; |
| phy-mode = "rgmii"; |
| tx-internal-delay-ps = <2000>; |
| rx-internal-delay-ps = <2000>; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| }; |
| |
| port@6 { |
| reg = <6>; |
| label = "lan5"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy6>; |
| }; |
| |
| port@7 { |
| reg = <7>; |
| label = "lan3"; |
| phy-mode = "internal"; |
| phy-handle = <&t1phy7>; |
| }; |
| }; |
| |
| mdio { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| t1phy0: ethernet-phy@0{ |
| reg = <0x0>; |
| }; |
| |
| t1phy1: ethernet-phy@1{ |
| reg = <0x1>; |
| }; |
| |
| t1phy2: ethernet-phy@2{ |
| reg = <0x2>; |
| }; |
| |
| t1phy3: ethernet-phy@3{ |
| reg = <0x3>; |
| }; |
| |
| t1phy6: ethernet-phy@6{ |
| reg = <0x6>; |
| }; |
| |
| t1phy7: ethernet-phy@7{ |
| reg = <0x7>; |
| }; |
| }; |
| }; |
| }; |