| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI) |
| |
| maintainers: |
| - Andy Gross <agross@kernel.org> |
| - Bjorn Andersson <bjorn.andersson@linaro.org> |
| - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
| |
| description: |
| The QUP core is an AHB slave that provides a common data path (an output FIFO |
| and an input FIFO) for serial peripheral interface (SPI) mini-core. |
| |
| SPI in master mode supports up to 50MHz, up to four chip selects, |
| programmable data path from 4 bits to 32 bits and numerous protocol variants. |
| |
| allOf: |
| - $ref: /schemas/spi/spi-controller.yaml# |
| |
| properties: |
| compatible: |
| enum: |
| - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064 |
| - qcom,spi-qup-v2.1.1 # for 8974 and later |
| - qcom,spi-qup-v2.2.1 # for 8974 v2 and later |
| |
| clocks: |
| maxItems: 2 |
| |
| clock-names: |
| items: |
| - const: core |
| - const: iface |
| |
| dmas: |
| maxItems: 2 |
| |
| dma-names: |
| items: |
| - const: tx |
| - const: rx |
| |
| interconnects: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| operating-points-v2: true |
| |
| power-domains: |
| maxItems: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - interrupts |
| - reg |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,gcc-msm8996.h> |
| #include <dt-bindings/interconnect/qcom,msm8996.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/power/qcom-rpmpd.h> |
| |
| spi@7575000 { |
| compatible = "qcom,spi-qup-v2.2.1"; |
| reg = <0x07575000 0x600>; |
| interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, |
| <&gcc GCC_BLSP1_AHB_CLK>; |
| clock-names = "core", "iface"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&blsp1_spi1_default>; |
| pinctrl-1 = <&blsp1_spi1_sleep>; |
| dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; |
| dma-names = "tx", "rx"; |
| power-domains = <&rpmpd MSM8996_VDDCX>; |
| operating-points-v2 = <&spi_opp_table>; |
| interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |