| /* SPDX-License-Identifier: GPL-2.0 */ |
| /****************************************************************************** |
| * |
| * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. |
| * |
| ******************************************************************************/ |
| #ifndef __ODM_TYPES_H__ |
| #define __ODM_TYPES_H__ |
| |
| #include <drv_types.h> |
| |
| /* Deifne HW endian support */ |
| #define ODM_ENDIAN_BIG 0 |
| #define ODM_ENDIAN_LITTLE 1 |
| |
| #define GET_ODM(__padapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__padapter))->odmpriv))) |
| |
| enum hal_status { |
| HAL_STATUS_SUCCESS, |
| HAL_STATUS_FAILURE, |
| /*RT_STATUS_PENDING, |
| RT_STATUS_RESOURCE, |
| RT_STATUS_INVALID_CONTEXT, |
| RT_STATUS_INVALID_PARAMETER, |
| RT_STATUS_NOT_SUPPORT, |
| RT_STATUS_OS_API_FAILED,*/ |
| }; |
| |
| |
| #if defined(__LITTLE_ENDIAN) |
| #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE |
| #else |
| #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG |
| #endif |
| |
| #define STA_INFO_T struct sta_info |
| #define PSTA_INFO_T struct sta_info * |
| |
| #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) |
| #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) |
| #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) |
| |
| /* define useless flag to avoid compile warning */ |
| #define USE_WORKITEM 0 |
| #define FPGA_TWO_MAC_VERIFICATION 0 |
| |
| #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) |
| #define COND_ELSE 2 |
| #define COND_ENDIF 3 |
| |
| #endif /* __ODM_TYPES_H__ */ |