blob: 672d748fcc67c8a6d6c877c55694a38231be048b [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* DT-overlay to run the PCIe3_4L Dual Mode controller in Endpoint mode
* in the SRNS (Separate Reference Clock No Spread) configuration.
*
* NOTE: If using a setup with two ROCK 5B:s, with one board running in
* RC mode and the other board running in EP mode, see also the device
* tree overlay: rk3588-rock-5b-pcie-srns.dtso.
*/
/dts-v1/;
/plugin/;
&pcie30phy {
rockchip,rx-common-refclk-mode = <0 0 0 0>;
};
&pcie3x4 {
status = "disabled";
};
&pcie3x4_ep {
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};