| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Qualcomm interconnect IDs |
| * |
| * Copyright (c) 2020, Linaro Ltd. |
| * Author: Jun Nie <jun.nie@linaro.org> |
| */ |
| |
| #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H |
| #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H |
| |
| #define BIMC_SNOC_SLV 0 |
| #define MASTER_QDSS_BAM 1 |
| #define MASTER_QDSS_ETR 2 |
| #define MASTER_SNOC_CFG 3 |
| #define PCNOC_SNOC_SLV 4 |
| #define SLAVE_APSS 5 |
| #define SLAVE_CATS_128 6 |
| #define SLAVE_OCMEM_64 7 |
| #define SLAVE_IMEM 8 |
| #define SLAVE_QDSS_STM 9 |
| #define SLAVE_SRVC_SNOC 10 |
| #define SNOC_BIMC_0_MAS 11 |
| #define SNOC_BIMC_1_MAS 12 |
| #define SNOC_BIMC_2_MAS 13 |
| #define SNOC_INT_0 14 |
| #define SNOC_INT_1 15 |
| #define SNOC_INT_BIMC 16 |
| #define SNOC_PCNOC_MAS 17 |
| #define SNOC_QDSS_INT 18 |
| |
| #define MASTER_VIDEO_P0 0 |
| #define MASTER_JPEG 1 |
| #define MASTER_VFE 2 |
| #define MASTER_MDP_PORT0 3 |
| #define MASTER_MDP_PORT1 4 |
| #define MASTER_CPP 5 |
| #define SNOC_MM_INT_0 6 |
| #define SNOC_MM_INT_1 7 |
| #define SNOC_MM_INT_2 8 |
| |
| #define BIMC_SNOC_MAS 0 |
| #define MASTER_AMPSS_M0 1 |
| #define MASTER_GRAPHICS_3D 2 |
| #define MASTER_TCU0 3 |
| #define SLAVE_AMPSS_L2 4 |
| #define SLAVE_EBI_CH0 5 |
| #define SNOC_BIMC_0_SLV 6 |
| #define SNOC_BIMC_1_SLV 7 |
| #define SNOC_BIMC_2_SLV 8 |
| |
| #define MASTER_BLSP_1 0 |
| #define MASTER_DEHR 1 |
| #define MASTER_LPASS 2 |
| #define MASTER_CRYPTO_CORE0 3 |
| #define MASTER_SDCC_1 4 |
| #define MASTER_SDCC_2 5 |
| #define MASTER_SPDM 6 |
| #define MASTER_USB_HS1 7 |
| #define MASTER_USB_HS2 8 |
| #define PCNOC_INT_0 9 |
| #define PCNOC_INT_1 10 |
| #define PCNOC_MAS_0 11 |
| #define PCNOC_MAS_1 12 |
| #define PCNOC_SLV_0 13 |
| #define PCNOC_SLV_1 14 |
| #define PCNOC_SLV_2 15 |
| #define PCNOC_SLV_3 16 |
| #define PCNOC_SLV_4 17 |
| #define PCNOC_SLV_8 18 |
| #define PCNOC_SLV_9 19 |
| #define PCNOC_SNOC_MAS 20 |
| #define SLAVE_BIMC_CFG 21 |
| #define SLAVE_BLSP_1 22 |
| #define SLAVE_BOOT_ROM 23 |
| #define SLAVE_CAMERA_CFG 24 |
| #define SLAVE_CLK_CTL 25 |
| #define SLAVE_CRYPTO_0_CFG 26 |
| #define SLAVE_DEHR_CFG 27 |
| #define SLAVE_DISPLAY_CFG 28 |
| #define SLAVE_GRAPHICS_3D_CFG 29 |
| #define SLAVE_IMEM_CFG 30 |
| #define SLAVE_LPASS 31 |
| #define SLAVE_MPM 32 |
| #define SLAVE_MSG_RAM 33 |
| #define SLAVE_MSS 34 |
| #define SLAVE_PDM 35 |
| #define SLAVE_PMIC_ARB 36 |
| #define SLAVE_PCNOC_CFG 37 |
| #define SLAVE_PRNG 38 |
| #define SLAVE_QDSS_CFG 39 |
| #define SLAVE_RBCPR_CFG 40 |
| #define SLAVE_SDCC_1 41 |
| #define SLAVE_SDCC_2 42 |
| #define SLAVE_SECURITY 43 |
| #define SLAVE_SNOC_CFG 44 |
| #define SLAVE_SPDM 45 |
| #define SLAVE_TCSR 46 |
| #define SLAVE_TLMM 47 |
| #define SLAVE_USB_HS1 48 |
| #define SLAVE_USB_HS2 49 |
| #define SLAVE_VENUS_CFG 50 |
| #define SNOC_PCNOC_SLV 51 |
| |
| #endif |
