| * Freescale i.MX7ULP Watchdog Timer (WDT) Controller |
| |
| Required properties: |
| - compatible : Should be "fsl,imx7ulp-wdt" |
| - reg : Should contain WDT registers location and length |
| - interrupts : Should contain WDT interrupt |
| - clocks: Should contain a phandle pointing to the gated peripheral clock. |
| |
| Optional properties: |
| - timeout-sec : Contains the watchdog timeout in seconds |
| |
| Examples: |
| |
| wdog1: watchdog@403d0000 { |
| compatible = "fsl,imx7ulp-wdt"; |
| reg = <0x403d0000 0x10000>; |
| interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&pcc2 IMX7ULP_CLK_WDG1>; |
| assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; |
| assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; |
| timeout-sec = <40>; |
| }; |
