| # SPDX-License-Identifier: GPL-2.0+ |
| $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| title: Allwinner A80 Display Engine Clock Controller |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| const: allwinner,sun9i-a80-de-clks |
| - description: RAM Bus Clock |
| - description: Module Clock |
| additionalProperties: false |
| #include <dt-bindings/clock/sun9i-a80-ccu.h> |
| #include <dt-bindings/reset/sun9i-a80-ccu.h> |
| de_clocks: clock@3000000 { |
| compatible = "allwinner,sun9i-a80-de-clks"; |
| clocks = <&ccu CLK_DE>, <&ccu CLK_SDRAM>, <&ccu CLK_BUS_DE>; |
| clock-names = "mod", "dram", "bus"; |
| resets = <&ccu RST_BUS_DE>; |