| # |
| # Performance Monitor Drivers |
| # |
| |
| menu "Performance monitor support" |
| depends on PERF_EVENTS |
| |
| config ARM_CCI_PMU |
| bool |
| select ARM_CCI |
| |
| config ARM_CCI400_PMU |
| bool "ARM CCI400 PMU support" |
| depends on (ARM && CPU_V7) || ARM64 |
| select ARM_CCI400_COMMON |
| select ARM_CCI_PMU |
| help |
| Support for PMU events monitoring on the ARM CCI-400 (cache coherent |
| interconnect). CCI-400 supports counting events related to the |
| connected slave/master interfaces. |
| |
| config ARM_CCI5xx_PMU |
| bool "ARM CCI-500/CCI-550 PMU support" |
| depends on (ARM && CPU_V7) || ARM64 |
| select ARM_CCI_PMU |
| help |
| Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache |
| coherent interconnects. Both of them provide 8 independent event counters, |
| which can count events pertaining to the slave/master interfaces as well |
| as the internal events to the CCI. |
| |
| If unsure, say Y |
| |
| config ARM_CCN |
| tristate "ARM CCN driver support" |
| depends on ARM || ARM64 |
| help |
| PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) |
| interconnect. |
| |
| config ARM_PMU |
| depends on ARM || ARM64 |
| bool "ARM PMU framework" |
| default y |
| help |
| Say y if you want to use CPU performance monitors on ARM-based |
| systems. |
| |
| config ARM_PMU_ACPI |
| depends on ARM_PMU && ACPI |
| def_bool y |
| |
| config ARM_DSU_PMU |
| tristate "ARM DynamIQ Shared Unit (DSU) PMU" |
| depends on ARM64 |
| help |
| Provides support for performance monitor unit in ARM DynamIQ Shared |
| Unit (DSU). The DSU integrates one or more cores with an L3 memory |
| system, control logic. The PMU allows counting various events related |
| to DSU. |
| |
| config HISI_PMU |
| bool "HiSilicon SoC PMU" |
| depends on ARM64 && ACPI |
| help |
| Support for HiSilicon SoC uncore performance monitoring |
| unit (PMU), such as: L3C, HHA and DDRC. |
| |
| config QCOM_L2_PMU |
| bool "Qualcomm Technologies L2-cache PMU" |
| depends on ARCH_QCOM && ARM64 && ACPI |
| help |
| Provides support for the L2 cache performance monitor unit (PMU) |
| in Qualcomm Technologies processors. |
| Adds the L2 cache PMU into the perf events subsystem for |
| monitoring L2 cache events. |
| |
| config QCOM_L3_PMU |
| bool "Qualcomm Technologies L3-cache PMU" |
| depends on ARCH_QCOM && ARM64 && ACPI |
| select QCOM_IRQ_COMBINER |
| help |
| Provides support for the L3 cache performance monitor unit (PMU) |
| in Qualcomm Technologies processors. |
| Adds the L3 cache PMU into the perf events subsystem for |
| monitoring L3 cache events. |
| |
| config XGENE_PMU |
| depends on ARCH_XGENE |
| bool "APM X-Gene SoC PMU" |
| default n |
| help |
| Say y if you want to use APM X-Gene SoC performance monitors. |
| |
| config ARM_SPE_PMU |
| tristate "Enable support for the ARMv8.2 Statistical Profiling Extension" |
| depends on PERF_EVENTS && ARM64 |
| help |
| Enable perf support for the ARMv8.2 Statistical Profiling |
| Extension, which provides periodic sampling of operations in |
| the CPU pipeline and reports this via the perf AUX interface. |
| |
| endmenu |
