Documentation/devicetree/bindings/pwm/pwm-rockchip.txt

Rockchip PWM controller

Required properties:
 - compatible: should be "rockchip,<name>-pwm"
   "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
   "rockchip,rk3288-pwm": found on RK3288 SOC
   "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
   "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
 - reg: physical base address and length of the controller's registers
 - clocks: See ../clock/clock-bindings.txt
   - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
     - There is one clock that's used both to derive the functional clock
       for the device and as the bus clock.
   - For newer hardware (rk3328 and future socs): specified by name
     - "pwm": This is used to derive the functional clock.
     - "pclk": This is the APB bus clock.
 - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
   for a description of the cell format.

Example:

	pwm0: pwm@20030000 {
		compatible = "rockchip,rk2928-pwm";
		reg = <0x20030000 0x10>;
		clocks = <&cru PCLK_PWM01>;
		#pwm-cells = <2>;
	};