| /* |
| * Copyright 2004-2009 Analog Devices Inc. |
| * 2005 National ICT Australia (NICTA) |
| * Aidan Williams <aidan@nicta.com.au> |
| * |
| * Licensed under the GPL-2 |
| */ |
| |
| #include <linux/device.h> |
| #include <linux/platform_device.h> |
| #include <linux/mtd/mtd.h> |
| #include <linux/mtd/physmap.h> |
| #include <linux/mtd/partitions.h> |
| #include <linux/spi/spi.h> |
| #include <linux/spi/flash.h> |
| #include <linux/irq.h> |
| #include <linux/interrupt.h> |
| #include <asm/bfin5xx_spi.h> |
| #include <asm/dma.h> |
| #include <asm/gpio.h> |
| #include <asm/nand.h> |
| #include <asm/portmux.h> |
| #include <asm/dpmc.h> |
| #include <linux/input.h> |
| |
| /* |
| * Name the Board for the /proc/cpuinfo |
| */ |
| const char bfin_board_name[] = "ADI BF538-EZKIT"; |
| |
| /* |
| * Driver needs to know address, irq and flag pin. |
| */ |
| |
| |
| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| static struct platform_device rtc_device = { |
| .name = "rtc-bfin", |
| .id = -1, |
| }; |
| #endif /* CONFIG_RTC_DRV_BFIN */ |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| static struct resource bfin_uart0_resources[] = { |
| { |
| .start = UART0_THR, |
| .end = UART0_GCTL+2, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART0_TX, |
| .end = IRQ_UART0_TX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART0_RX, |
| .end = IRQ_UART0_RX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART0_ERROR, |
| .end = IRQ_UART0_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART0_TX, |
| .end = CH_UART0_TX, |
| .flags = IORESOURCE_DMA, |
| }, |
| { |
| .start = CH_UART0_RX, |
| .end = CH_UART0_RX, |
| .flags = IORESOURCE_DMA, |
| }, |
| #ifdef CONFIG_BFIN_UART0_CTSRTS |
| { /* CTS pin */ |
| .start = GPIO_PG7, |
| .end = GPIO_PG7, |
| .flags = IORESOURCE_IO, |
| }, |
| { /* RTS pin */ |
| .start = GPIO_PG6, |
| .end = GPIO_PG6, |
| .flags = IORESOURCE_IO, |
| }, |
| #endif |
| }; |
| |
| static unsigned short bfin_uart0_peripherals[] = { |
| P_UART0_TX, P_UART0_RX, 0 |
| }; |
| |
| static struct platform_device bfin_uart0_device = { |
| .name = "bfin-uart", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_uart0_resources), |
| .resource = bfin_uart0_resources, |
| .dev = { |
| .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_UART0 */ |
| #ifdef CONFIG_SERIAL_BFIN_UART1 |
| static struct resource bfin_uart1_resources[] = { |
| { |
| .start = UART1_THR, |
| .end = UART1_GCTL+2, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART1_TX, |
| .end = IRQ_UART1_TX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART1_RX, |
| .end = IRQ_UART1_RX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART1_ERROR, |
| .end = IRQ_UART1_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART1_TX, |
| .end = CH_UART1_TX, |
| .flags = IORESOURCE_DMA, |
| }, |
| { |
| .start = CH_UART1_RX, |
| .end = CH_UART1_RX, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| |
| static unsigned short bfin_uart1_peripherals[] = { |
| P_UART1_TX, P_UART1_RX, 0 |
| }; |
| |
| static struct platform_device bfin_uart1_device = { |
| .name = "bfin-uart", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_uart1_resources), |
| .resource = bfin_uart1_resources, |
| .dev = { |
| .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_UART1 */ |
| #ifdef CONFIG_SERIAL_BFIN_UART2 |
| static struct resource bfin_uart2_resources[] = { |
| { |
| .start = UART2_THR, |
| .end = UART2_GCTL+2, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART2_TX, |
| .end = IRQ_UART2_TX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART2_RX, |
| .end = IRQ_UART2_RX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_UART2_ERROR, |
| .end = IRQ_UART2_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART2_TX, |
| .end = CH_UART2_TX, |
| .flags = IORESOURCE_DMA, |
| }, |
| { |
| .start = CH_UART2_RX, |
| .end = CH_UART2_RX, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| |
| static unsigned short bfin_uart2_peripherals[] = { |
| P_UART2_TX, P_UART2_RX, 0 |
| }; |
| |
| static struct platform_device bfin_uart2_device = { |
| .name = "bfin-uart", |
| .id = 2, |
| .num_resources = ARRAY_SIZE(bfin_uart2_resources), |
| .resource = bfin_uart2_resources, |
| .dev = { |
| .platform_data = &bfin_uart2_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_UART2 */ |
| #endif /* CONFIG_SERIAL_BFIN */ |
| |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| #ifdef CONFIG_BFIN_SIR0 |
| static struct resource bfin_sir0_resources[] = { |
| { |
| .start = 0xFFC00400, |
| .end = 0xFFC004FF, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART0_RX, |
| .end = IRQ_UART0_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART0_RX, |
| .end = CH_UART0_RX+1, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| static struct platform_device bfin_sir0_device = { |
| .name = "bfin_sir", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| .resource = bfin_sir0_resources, |
| }; |
| #endif /* CONFIG_BFIN_SIR0 */ |
| #ifdef CONFIG_BFIN_SIR1 |
| static struct resource bfin_sir1_resources[] = { |
| { |
| .start = 0xFFC02000, |
| .end = 0xFFC020FF, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART1_RX, |
| .end = IRQ_UART1_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART1_RX, |
| .end = CH_UART1_RX+1, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| static struct platform_device bfin_sir1_device = { |
| .name = "bfin_sir", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_sir1_resources), |
| .resource = bfin_sir1_resources, |
| }; |
| #endif /* CONFIG_BFIN_SIR1 */ |
| #ifdef CONFIG_BFIN_SIR2 |
| static struct resource bfin_sir2_resources[] = { |
| { |
| .start = 0xFFC02100, |
| .end = 0xFFC021FF, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_UART2_RX, |
| .end = IRQ_UART2_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = CH_UART2_RX, |
| .end = CH_UART2_RX+1, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| static struct platform_device bfin_sir2_device = { |
| .name = "bfin_sir", |
| .id = 2, |
| .num_resources = ARRAY_SIZE(bfin_sir2_resources), |
| .resource = bfin_sir2_resources, |
| }; |
| #endif /* CONFIG_BFIN_SIR2 */ |
| #endif /* CONFIG_BFIN_SIR */ |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| static struct resource bfin_sport0_uart_resources[] = { |
| { |
| .start = SPORT0_TCR1, |
| .end = SPORT0_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT0_RX, |
| .end = IRQ_SPORT0_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT0_ERROR, |
| .end = IRQ_SPORT0_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport0_peripherals[] = { |
| P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, |
| P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 |
| }; |
| |
| static struct platform_device bfin_sport0_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), |
| .resource = bfin_sport0_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_SPORT0_UART */ |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| static struct resource bfin_sport1_uart_resources[] = { |
| { |
| .start = SPORT1_TCR1, |
| .end = SPORT1_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT1_RX, |
| .end = IRQ_SPORT1_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT1_ERROR, |
| .end = IRQ_SPORT1_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport1_peripherals[] = { |
| P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, |
| P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 |
| }; |
| |
| static struct platform_device bfin_sport1_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), |
| .resource = bfin_sport1_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_SPORT1_UART */ |
| #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| static struct resource bfin_sport2_uart_resources[] = { |
| { |
| .start = SPORT2_TCR1, |
| .end = SPORT2_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT2_RX, |
| .end = IRQ_SPORT2_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT2_ERROR, |
| .end = IRQ_SPORT2_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport2_peripherals[] = { |
| P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, |
| P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0 |
| }; |
| |
| static struct platform_device bfin_sport2_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 2, |
| .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources), |
| .resource = bfin_sport2_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_SPORT2_UART */ |
| #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART |
| static struct resource bfin_sport3_uart_resources[] = { |
| { |
| .start = SPORT3_TCR1, |
| .end = SPORT3_MRCS3+4, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_SPORT3_RX, |
| .end = IRQ_SPORT3_RX+1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_SPORT3_ERROR, |
| .end = IRQ_SPORT3_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static unsigned short bfin_sport3_peripherals[] = { |
| P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, |
| P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0 |
| }; |
| |
| static struct platform_device bfin_sport3_uart_device = { |
| .name = "bfin-sport-uart", |
| .id = 3, |
| .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources), |
| .resource = bfin_sport3_uart_resources, |
| .dev = { |
| .platform_data = &bfin_sport3_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_SERIAL_BFIN_SPORT3_UART */ |
| #endif /* CONFIG_SERIAL_BFIN_SPORT */ |
| |
| #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
| static unsigned short bfin_can_peripherals[] = { |
| P_CAN0_RX, P_CAN0_TX, 0 |
| }; |
| |
| static struct resource bfin_can_resources[] = { |
| { |
| .start = 0xFFC02A00, |
| .end = 0xFFC02FFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = IRQ_CAN_RX, |
| .end = IRQ_CAN_RX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_CAN_TX, |
| .end = IRQ_CAN_TX, |
| .flags = IORESOURCE_IRQ, |
| }, |
| { |
| .start = IRQ_CAN_ERROR, |
| .end = IRQ_CAN_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static struct platform_device bfin_can_device = { |
| .name = "bfin_can", |
| .num_resources = ARRAY_SIZE(bfin_can_resources), |
| .resource = bfin_can_resources, |
| .dev = { |
| .platform_data = &bfin_can_peripherals, /* Passed to driver */ |
| }, |
| }; |
| #endif /* CONFIG_CAN_BFIN */ |
| |
| /* |
| * USB-LAN EzExtender board |
| * Driver needs to know address, irq and flag pin. |
| */ |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| #include <linux/smc91x.h> |
| |
| static struct smc91x_platdata smc91x_info = { |
| .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, |
| .leda = RPC_LED_100_10, |
| .ledb = RPC_LED_TX_RX, |
| }; |
| |
| static struct resource smc91x_resources[] = { |
| { |
| .name = "smc91x-regs", |
| .start = 0x20310300, |
| .end = 0x20310300 + 16, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF0, |
| .end = IRQ_PF0, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| }, |
| }; |
| static struct platform_device smc91x_device = { |
| .name = "smc91x", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(smc91x_resources), |
| .resource = smc91x_resources, |
| .dev = { |
| .platform_data = &smc91x_info, |
| }, |
| }; |
| #endif /* CONFIG_SMC91X */ |
| |
| #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) |
| /* all SPI peripherals info goes here */ |
| #if defined(CONFIG_MTD_M25P80) \ |
| || defined(CONFIG_MTD_M25P80_MODULE) |
| /* SPI flash chip (m25p16) */ |
| static struct mtd_partition bfin_spi_flash_partitions[] = { |
| { |
| .name = "bootloader(spi)", |
| .size = 0x00040000, |
| .offset = 0, |
| .mask_flags = MTD_CAP_ROM |
| }, { |
| .name = "linux kernel(spi)", |
| .size = 0x1c0000, |
| .offset = 0x40000 |
| } |
| }; |
| |
| static struct flash_platform_data bfin_spi_flash_data = { |
| .name = "m25p80", |
| .parts = bfin_spi_flash_partitions, |
| .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| .type = "m25p16", |
| }; |
| |
| static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| .enable_dma = 0, /* use dma transfer with this chip*/ |
| }; |
| #endif /* CONFIG_MTD_M25P80 */ |
| #endif /* CONFIG_SPI_BFIN5XX */ |
| |
| #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
| #include <linux/spi/ad7879.h> |
| static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
| .model = 7879, /* Model = AD7879 */ |
| .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ |
| .pressure_max = 10000, |
| .pressure_min = 0, |
| .first_conversion_delay = 3, /* wait 512us before do a first conversion */ |
| .acquisition_time = 1, /* 4us acquisition time per sample */ |
| .median = 2, /* do 8 measurements */ |
| .averaging = 1, /* take the average of 4 middle samples */ |
| .pen_down_acc_interval = 255, /* 9.4 ms */ |
| .gpio_export = 1, /* Export GPIO to gpiolib */ |
| .gpio_base = -1, /* Dynamic allocation */ |
| }; |
| #endif /* CONFIG_TOUCHSCREEN_AD7879 */ |
| |
| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| #include <asm/bfin-lq035q1.h> |
| |
| static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { |
| .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, |
| .ppi_mode = USE_RGB565_16_BIT_PPI, |
| .use_bl = 0, /* let something else control the LCD Blacklight */ |
| .gpio_bl = GPIO_PF7, |
| }; |
| |
| static struct resource bfin_lq035q1_resources[] = { |
| { |
| .start = IRQ_PPI_ERROR, |
| .end = IRQ_PPI_ERROR, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static struct platform_device bfin_lq035q1_device = { |
| .name = "bfin-lq035q1", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), |
| .resource = bfin_lq035q1_resources, |
| .dev = { |
| .platform_data = &bfin_lq035q1_data, |
| }, |
| }; |
| #endif /* CONFIG_FB_BFIN_LQ035Q1 */ |
| |
| static struct spi_board_info bf538_spi_board_info[] __initdata = { |
| #if defined(CONFIG_MTD_M25P80) \ |
| || defined(CONFIG_MTD_M25P80_MODULE) |
| { |
| /* the modalias must be the same as spi device driver name */ |
| .modalias = "m25p80", /* Name of spi_driver for this device */ |
| .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, /* Framework bus number */ |
| .chip_select = 1, /* SPI_SSEL1*/ |
| .platform_data = &bfin_spi_flash_data, |
| .controller_data = &spi_flash_chip_info, |
| .mode = SPI_MODE_3, |
| }, |
| #endif /* CONFIG_MTD_M25P80 */ |
| #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| { |
| .modalias = "ad7879", |
| .platform_data = &bfin_ad7879_ts_info, |
| .irq = IRQ_PF3, |
| .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 1, |
| .mode = SPI_CPHA | SPI_CPOL, |
| }, |
| #endif /* CONFIG_TOUCHSCREEN_AD7879_SPI */ |
| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| { |
| .modalias = "bfin-lq035q1-spi", |
| .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 2, |
| .mode = SPI_CPHA | SPI_CPOL, |
| }, |
| #endif /* CONFIG_FB_BFIN_LQ035Q1 */ |
| #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| { |
| .modalias = "spidev", |
| .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 1, |
| }, |
| #endif /* CONFIG_SPI_SPIDEV */ |
| }; |
| |
| /* SPI (0) */ |
| static struct resource bfin_spi0_resource[] = { |
| [0] = { |
| .start = SPI0_REGBASE, |
| .end = SPI0_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = CH_SPI0, |
| .end = CH_SPI0, |
| .flags = IORESOURCE_DMA, |
| }, |
| [2] = { |
| .start = IRQ_SPI0, |
| .end = IRQ_SPI0, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| /* SPI (1) */ |
| static struct resource bfin_spi1_resource[] = { |
| [0] = { |
| .start = SPI1_REGBASE, |
| .end = SPI1_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = CH_SPI1, |
| .end = CH_SPI1, |
| .flags = IORESOURCE_DMA, |
| }, |
| [2] = { |
| .start = IRQ_SPI1, |
| .end = IRQ_SPI1, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| /* SPI (2) */ |
| static struct resource bfin_spi2_resource[] = { |
| [0] = { |
| .start = SPI2_REGBASE, |
| .end = SPI2_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = CH_SPI2, |
| .end = CH_SPI2, |
| .flags = IORESOURCE_DMA, |
| }, |
| [2] = { |
| .start = IRQ_SPI2, |
| .end = IRQ_SPI2, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| /* SPI controller data */ |
| static struct bfin5xx_spi_master bf538_spi_master_info0 = { |
| .num_chipselect = 8, |
| .enable_dma = 1, /* master has the ability to do dma transfer */ |
| .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| }; |
| |
| static struct platform_device bf538_spi_master0 = { |
| .name = "bfin-spi", |
| .id = 0, /* Bus number */ |
| .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| .resource = bfin_spi0_resource, |
| .dev = { |
| .platform_data = &bf538_spi_master_info0, /* Passed to driver */ |
| }, |
| }; |
| |
| static struct bfin5xx_spi_master bf538_spi_master_info1 = { |
| .num_chipselect = 2, |
| .enable_dma = 1, /* master has the ability to do dma transfer */ |
| .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, |
| }; |
| |
| static struct platform_device bf538_spi_master1 = { |
| .name = "bfin-spi", |
| .id = 1, /* Bus number */ |
| .num_resources = ARRAY_SIZE(bfin_spi1_resource), |
| .resource = bfin_spi1_resource, |
| .dev = { |
| .platform_data = &bf538_spi_master_info1, /* Passed to driver */ |
| }, |
| }; |
| |
| static struct bfin5xx_spi_master bf538_spi_master_info2 = { |
| .num_chipselect = 2, |
| .enable_dma = 1, /* master has the ability to do dma transfer */ |
| .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0}, |
| }; |
| |
| static struct platform_device bf538_spi_master2 = { |
| .name = "bfin-spi", |
| .id = 2, /* Bus number */ |
| .num_resources = ARRAY_SIZE(bfin_spi2_resource), |
| .resource = bfin_spi2_resource, |
| .dev = { |
| .platform_data = &bf538_spi_master_info2, /* Passed to driver */ |
| }, |
| }; |
| |
| #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0}; |
| |
| static struct resource bfin_twi0_resource[] = { |
| [0] = { |
| .start = TWI0_REGBASE, |
| .end = TWI0_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_TWI0, |
| .end = IRQ_TWI0, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static struct platform_device i2c_bfin_twi0_device = { |
| .name = "i2c-bfin-twi", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
| .resource = bfin_twi0_resource, |
| .dev = { |
| .platform_data = &bfin_twi0_pins, |
| }, |
| }; |
| |
| static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0}; |
| |
| static struct resource bfin_twi1_resource[] = { |
| [0] = { |
| .start = TWI1_REGBASE, |
| .end = TWI1_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_TWI1, |
| .end = IRQ_TWI1, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static struct platform_device i2c_bfin_twi1_device = { |
| .name = "i2c-bfin-twi", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_twi1_resource), |
| .resource = bfin_twi1_resource, |
| }; |
| #endif /* CONFIG_I2C_BLACKFIN_TWI */ |
| |
| #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| #include <linux/gpio_keys.h> |
| |
| static struct gpio_keys_button bfin_gpio_keys_table[] = { |
| {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"}, |
| }; |
| |
| static struct gpio_keys_platform_data bfin_gpio_keys_data = { |
| .buttons = bfin_gpio_keys_table, |
| .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), |
| }; |
| |
| static struct platform_device bfin_device_gpiokeys = { |
| .name = "gpio-keys", |
| .dev = { |
| .platform_data = &bfin_gpio_keys_data, |
| }, |
| }; |
| #endif |
| |
| static const unsigned int cclk_vlev_datasheet[] = |
| { |
| /* |
| * Internal VLEV BF538SBBC1533 |
| ****temporarily using these values until data sheet is updated |
| */ |
| VRPAIR(VLEV_100, 150000000), |
| VRPAIR(VLEV_100, 250000000), |
| VRPAIR(VLEV_110, 276000000), |
| VRPAIR(VLEV_115, 301000000), |
| VRPAIR(VLEV_120, 525000000), |
| VRPAIR(VLEV_125, 550000000), |
| VRPAIR(VLEV_130, 600000000), |
| }; |
| |
| static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { |
| .tuple_tab = cclk_vlev_datasheet, |
| .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), |
| .vr_settling_time = 25 /* us */, |
| }; |
| |
| static struct platform_device bfin_dpmc = { |
| .name = "bfin dpmc", |
| .dev = { |
| .platform_data = &bfin_dmpc_vreg_data, |
| }, |
| }; |
| |
| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| static struct mtd_partition ezkit_partitions[] = { |
| { |
| .name = "bootloader(nor)", |
| .size = 0x40000, |
| .offset = 0, |
| }, { |
| .name = "linux kernel(nor)", |
| .size = 0x180000, |
| .offset = MTDPART_OFS_APPEND, |
| }, { |
| .name = "file system(nor)", |
| .size = MTDPART_SIZ_FULL, |
| .offset = MTDPART_OFS_APPEND, |
| } |
| }; |
| |
| static struct physmap_flash_data ezkit_flash_data = { |
| .width = 2, |
| .parts = ezkit_partitions, |
| .nr_parts = ARRAY_SIZE(ezkit_partitions), |
| }; |
| |
| static struct resource ezkit_flash_resource = { |
| .start = 0x20000000, |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| .end = 0x202fffff, |
| #else |
| .end = 0x203fffff, |
| #endif |
| .flags = IORESOURCE_MEM, |
| }; |
| |
| static struct platform_device ezkit_flash_device = { |
| .name = "physmap-flash", |
| .id = 0, |
| .dev = { |
| .platform_data = &ezkit_flash_data, |
| }, |
| .num_resources = 1, |
| .resource = &ezkit_flash_resource, |
| }; |
| #endif |
| |
| static struct platform_device *cm_bf538_devices[] __initdata = { |
| |
| &bfin_dpmc, |
| |
| #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| &rtc_device, |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| &bfin_uart0_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_UART1 |
| &bfin_uart1_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_UART2 |
| &bfin_uart2_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) |
| &bf538_spi_master0, |
| &bf538_spi_master1, |
| &bf538_spi_master2, |
| #endif |
| |
| #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| &i2c_bfin_twi0_device, |
| &i2c_bfin_twi1_device, |
| #endif |
| |
| #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| #ifdef CONFIG_BFIN_SIR0 |
| &bfin_sir0_device, |
| #endif |
| #ifdef CONFIG_BFIN_SIR1 |
| &bfin_sir1_device, |
| #endif |
| #ifdef CONFIG_BFIN_SIR2 |
| &bfin_sir2_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| &bfin_sport0_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| &bfin_sport1_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| &bfin_sport2_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART |
| &bfin_sport3_uart_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
| &bfin_can_device, |
| #endif |
| |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| &smc91x_device, |
| #endif |
| |
| #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| &bfin_lq035q1_device, |
| #endif |
| |
| #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| &bfin_device_gpiokeys, |
| #endif |
| |
| #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| &ezkit_flash_device, |
| #endif |
| }; |
| |
| static int __init ezkit_init(void) |
| { |
| printk(KERN_INFO "%s(): registering device resources\n", __func__); |
| platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices)); |
| |
| #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) |
| spi_register_board_info(bf538_spi_board_info, |
| ARRAY_SIZE(bf538_spi_board_info)); |
| #endif |
| |
| return 0; |
| } |
| |
| arch_initcall(ezkit_init); |
| |
| static struct platform_device *ezkit_early_devices[] __initdata = { |
| #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) |
| #ifdef CONFIG_SERIAL_BFIN_UART0 |
| &bfin_uart0_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_UART1 |
| &bfin_uart1_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_UART2 |
| &bfin_uart2_device, |
| #endif |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) |
| #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| &bfin_sport0_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| &bfin_sport1_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| &bfin_sport2_uart_device, |
| #endif |
| #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART |
| &bfin_sport3_uart_device, |
| #endif |
| #endif |
| }; |
| |
| void __init native_machine_early_platform_add_devices(void) |
| { |
| printk(KERN_INFO "register early platform devices\n"); |
| early_platform_add_devices(ezkit_early_devices, |
| ARRAY_SIZE(ezkit_early_devices)); |
| } |
