config IRQCHIP | |
def_bool y | |
depends on OF_IRQ | |
config ARM_GIC | |
bool | |
select IRQ_DOMAIN | |
select MULTI_IRQ_HANDLER | |
config GIC_NON_BANKED | |
bool | |
config ARM_NVIC | |
bool | |
select IRQ_DOMAIN | |
select GENERIC_IRQ_CHIP | |
config ARM_VIC | |
bool | |
select IRQ_DOMAIN | |
select MULTI_IRQ_HANDLER | |
config ARM_VIC_NR | |
int | |
default 4 if ARCH_S5PV210 | |
default 3 if ARCH_S5PC100 | |
default 2 | |
depends on ARM_VIC | |
help | |
The maximum number of VICs available in the system, for | |
power management. | |
config BRCMSTB_L2_IRQ | |
bool | |
depends on ARM | |
select GENERIC_IRQ_CHIP | |
select IRQ_DOMAIN | |
config DW_APB_ICTL | |
bool | |
select IRQ_DOMAIN | |
config IMGPDC_IRQ | |
bool | |
select GENERIC_IRQ_CHIP | |
select IRQ_DOMAIN | |
config CLPS711X_IRQCHIP | |
bool | |
depends on ARCH_CLPS711X | |
select IRQ_DOMAIN | |
select MULTI_IRQ_HANDLER | |
select SPARSE_IRQ | |
default y | |
config ORION_IRQCHIP | |
bool | |
select IRQ_DOMAIN | |
select MULTI_IRQ_HANDLER | |
config RENESAS_INTC_IRQPIN | |
bool | |
select IRQ_DOMAIN | |
config RENESAS_IRQC | |
bool | |
select IRQ_DOMAIN | |
config TB10X_IRQC | |
bool | |
select IRQ_DOMAIN | |
select GENERIC_IRQ_CHIP | |
config VERSATILE_FPGA_IRQ | |
bool | |
select IRQ_DOMAIN | |
config VERSATILE_FPGA_IRQ_NR | |
int | |
default 4 | |
depends on VERSATILE_FPGA_IRQ | |
config XTENSA_MX | |
bool | |
select IRQ_DOMAIN | |
config IRQ_CROSSBAR | |
bool | |
help | |
Support for a CROSSBAR ip that preceeds the main interrupt controller. | |
The primary irqchip invokes the crossbar's callback which inturn allocates | |
a free irq and configures the IP. Thus the peripheral interrupts are | |
routed to one of the free irqchip interrupt lines. |