| # Timer Interrupt Frequency Configuration |
| Allows the configuration of the timer frequency. It is customary |
| to have the timer interrupt run at 1000 HZ but 100 HZ may be more |
| beneficial for servers and NUMA systems that do not need to have |
| a fast response for user interaction and that may experience bus |
| contention and cacheline bounces as a result of timer interrupts. |
| Note that the timer interrupt occurs on each processor in an SMP |
| environment leading to NR_CPUS * HZ number of timer interrupts |
| 100 HZ is a typical choice for servers, SMP and NUMA systems |
| with lots of processors that may show reduced performance if |
| too many timer interrupts are occurring. |
| 250 HZ is a good compromise choice allowing server performance |
| while also showing good interactive responsiveness even |
| 1000 HZ is the preferred choice for desktop systems and other |
| systems requiring fast interactive responses to events. |