Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt7622-pciesys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek PCIESYS clock and reset controller

description:
  The MediaTek PCIESYS controller provides various clocks to the system.

maintainers:
  - Matthias Brugger <matthias.bgg@gmail.com>

properties:
  compatible:
    oneOf:
      - items:
          - const: mediatek,mt7622-pciesys
          - const: syscon
      - const: mediatek,mt7629-pciesys

  reg:
    maxItems: 1

  "#clock-cells":
    const: 1
    description: The available clocks are defined in dt-bindings/clock/mt*-clk.h

  "#reset-cells":
    const: 1

required:
  - reg
  - "#clock-cells"
  - "#reset-cells"

additionalProperties: false

examples:
  - |
    clock-controller@1a100800 {
        compatible = "mediatek,mt7622-pciesys", "syscon";
        reg = <0x1a100800 0x1000>;
        #clock-cells = <1>;
        #reset-cells = <1>;
    };