blob: f94dacd962782287390cb3d2a151f1d180046549 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/renesas,fcp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car Frame Compression Processor (FCP)
maintainers:
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
description: |
The FCP is a companion module of video processing modules in the Renesas
R-Car Gen3 and RZ/G2 SoCs. It provides data compression and decompression,
data caching, and conversion of AXI transactions in order to reduce the
memory bandwidth.
There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and
FCP for FDP (FCPF). Their configuration and behaviour depend on the module
they are paired with. These DT bindings currently support the FCPV and FCPF.
properties:
compatible:
oneOf:
- enum:
- renesas,fcpv # FCP for VSP
- renesas,fcpf # FCP for FDP
- items:
- enum:
- renesas,r9a07g043u-fcpvd # RZ/G2UL
- renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
- renesas,r9a07g054-fcpvd # RZ/V2L
- const: renesas,fcpv # Generic FCP for VSP fallback
reg:
maxItems: 1
clocks: true
clock-names: true
iommus:
maxItems: 1
power-domains:
maxItems: 1
resets:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
- resets
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a07g043u-fcpvd
- renesas,r9a07g044-fcpvd
- renesas,r9a07g054-fcpvd
then:
properties:
clocks:
items:
- description: Main clock
- description: Register access clock
- description: Video clock
clock-names:
items:
- const: aclk
- const: pclk
- const: vclk
required:
- clock-names
else:
properties:
clocks:
maxItems: 1
clock-names: false
examples:
# R8A7795 (R-Car H3) FCP for VSP-D1
- |
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/power/r8a7795-sysc.h>
fcp@fea2f000 {
compatible = "renesas,fcpv";
reg = <0xfea2f000 0x200>;
clocks = <&cpg CPG_MOD 602>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 602>;
iommus = <&ipmmu_vi0 9>;
};
...