Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic SD / eMMC controller for S905/GXBB family SoCs

description:
  The MMC 5.1 compliant host controller on Amlogic provides the
  interface for SD, eMMC and SDIO devices

maintainers:
  - Neil Armstrong <neil.armstrong@linaro.org>

allOf:
  - $ref: mmc-controller.yaml#

properties:
  compatible:
    oneOf:
      - const: amlogic,meson-axg-mmc
      - items:
          - const: amlogic,meson-gx-mmc
          - const: amlogic,meson-gxbb-mmc

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    items:
      - description: mmc controller instance
      - description: card detect

  clocks:
    maxItems: 3

  clock-names:
    items:
      - const: core
      - const: clkin0
      - const: clkin1

  resets:
    maxItems: 1

  amlogic,dram-access-quirk:
    type: boolean
    description:
      set when controller's internal DMA engine cannot access the DRAM memory,
      like on the G12A dedicated SDIO controller.

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    mmc@70000 {
        compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
        reg = <0x70000 0x2000>;
        interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
        clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
        clock-names = "core", "clkin0", "clkin1";
        pinctrl-0 = <&emm_pins>;
        resets = <&reset_mmc>;
    };