Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Airoha EN7581 Frame Engine Ethernet controller

maintainers:
  - Lorenzo Bianconi <lorenzo@kernel.org>

description:
  The frame engine ethernet controller can be found on Airoha SoCs.
  These SoCs have multi-GMAC ports.

properties:
  compatible:
    enum:
      - airoha,en7581-eth

  reg:
    items:
      - description: Frame engine base address
      - description: QDMA0 base address
      - description: QDMA1 base address

  reg-names:
    items:
      - const: fe
      - const: qdma0
      - const: qdma1

  interrupts:
    items:
      - description: QDMA lan irq0
      - description: QDMA lan irq1
      - description: QDMA lan irq2
      - description: QDMA lan irq3
      - description: QDMA wan irq0
      - description: QDMA wan irq1
      - description: QDMA wan irq2
      - description: QDMA wan irq3
      - description: FE error irq
      - description: PDMA irq

  resets:
    maxItems: 8

  reset-names:
    items:
      - const: fe
      - const: pdma
      - const: qdma
      - const: xsi-mac
      - const: hsi0-mac
      - const: hsi1-mac
      - const: hsi-mac
      - const: xfp-mac

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

patternProperties:
  "^ethernet@[1-4]$":
    type: object
    unevaluatedProperties: false
    $ref: ethernet-controller.yaml#
    description:
      Ethernet GMAC port associated to the MAC controller
    properties:
      compatible:
        const: airoha,eth-mac

      reg:
        minimum: 1
        maximum: 4
        description: GMAC port identifier

    required:
      - reg
      - compatible

required:
  - compatible
  - reg
  - interrupts
  - resets
  - reset-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/en7523-clk.h>

    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      eth: ethernet@1fb50000 {
        compatible = "airoha,en7581-eth";
        reg = <0 0x1fb50000 0 0x2600>,
              <0 0x1fb54000 0 0x2000>,
              <0 0x1fb56000 0 0x2000>;
        reg-names = "fe", "qdma0", "qdma1";

        resets = <&scuclk 44>,
                 <&scuclk 30>,
                 <&scuclk 31>,
                 <&scuclk 6>,
                 <&scuclk 15>,
                 <&scuclk 16>,
                 <&scuclk 17>,
                 <&scuclk 26>;
        reset-names = "fe", "pdma", "qdma", "xsi-mac",
                      "hsi0-mac", "hsi1-mac", "hsi-mac",
                      "xfp-mac";

        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

        #address-cells = <1>;
        #size-cells = <0>;

        mac: ethernet@1 {
          compatible = "airoha,eth-mac";
          reg = <1>;
        };
      };
    };