| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| # Copyright (c) 2020 MediaTek |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: MediaTek Universal Flash Storage (UFS) M-PHY |
| |
| maintainers: |
| - Stanley Chu <stanley.chu@mediatek.com> |
| - Chunfeng Yun <chunfeng.yun@mediatek.com> |
| |
| description: | |
| UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro. |
| Each UFS M-PHY node should have its own node. |
| To bind UFS M-PHY with UFS host controller, the controller node should |
| contain a phandle reference to UFS M-PHY node. |
| |
| properties: |
| $nodename: |
| pattern: "^ufs-phy@[0-9a-f]+$" |
| |
| compatible: |
| oneOf: |
| - items: |
| - enum: |
| - mediatek,mt8195-ufsphy |
| - const: mediatek,mt8183-ufsphy |
| - const: mediatek,mt8183-ufsphy |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Unipro core control clock. |
| - description: M-PHY core control clock. |
| |
| clock-names: |
| items: |
| - const: unipro |
| - const: mp |
| |
| "#phy-cells": |
| const: 0 |
| |
| required: |
| - compatible |
| - reg |
| - "#phy-cells" |
| - clocks |
| - clock-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/mt8183-clk.h> |
| ufsphy: ufs-phy@11fa0000 { |
| compatible = "mediatek,mt8183-ufsphy"; |
| reg = <0x11fa0000 0xc000>; |
| clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>, |
| <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>; |
| clock-names = "unipro", "mp"; |
| #phy-cells = <0>; |
| }; |
| |
| ... |