Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-tx.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-tx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Starfive SoC MIPI D-PHY Tx Controller

maintainers:
  - Keith Zhao <keith.zhao@starfivetech.com>
  - Shengyang Chen <shengyang.chen@starfivetech.com>

description:
  The Starfive SoC uses the MIPI DSI D-PHY based on M31 IP to transfer
  DSI data.

properties:
  compatible:
    const: starfive,jh7110-dphy-tx

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: txesc

  resets:
    items:
      - description: MIPITX_DPHY_SYS reset

  reset-names:
    items:
      - const: sys

  power-domains:
    maxItems: 1

  "#phy-cells":
    const: 0

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - resets
  - reset-names
  - power-domains
  - "#phy-cells"

additionalProperties: false

examples:
  - |
    phy@295e0000 {
      compatible = "starfive,jh7110-dphy-tx";
      reg = <0x295e0000 0x10000>;
      clocks = <&voutcrg 14>;
      clock-names = "txesc";
      resets = <&syscrg 10>;
      reset-names = "sys";
      power-domains = <&aon_syscon 0>;
      #phy-cells = <0>;
    };