blob: db761dcbf72af28888d10fac32b8d6ab9afcf662 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra234 xHCI controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
description: |
The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
the Tegra XUSB pad controller. The xHCI controller controls up to eight
ports; there are four USB 2.0 ports and four USB 3.2 Gen1 x1 ports.
properties:
compatible:
const: nvidia,tegra234-xusb
reg:
items:
- description: xHCI host registers
- description: XUSB FPCI registers
- description: XUSB bar2 registers
reg-names:
items:
- const: hcd
- const: fpci
- const: bar2
interrupts:
items:
- description: xHCI host interrupt
- description: mailbox interrupt
clocks:
items:
- description: XUSB host clock
- description: XUSB Falcon source clock
- description: XUSB SuperSpeed clock
- description: XUSB SuperSpeed source clock
- description: XUSB HighSpeed clock source
- description: XUSB FullSpeed clock source
- description: USB PLL
- description: reference clock
- description: I/O PLL
clock-names:
items:
- const: xusb_host
- const: xusb_falcon_src
- const: xusb_ss
- const: xusb_ss_src
- const: xusb_hs_src
- const: xusb_fs_src
- const: pll_u_480m
- const: clk_m
- const: pll_e
interconnects:
items:
- description: read client
- description: write client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the XUSB pad controller that is used to configure
the USB pads used by the XHCI controller
phys:
minItems: 1
maxItems: 8
phy-names:
minItems: 1
maxItems: 8
items:
enum:
- usb2-0
- usb2-1
- usb2-2
- usb2-3
- usb3-0
- usb3-1
- usb3-2
- usb3-3
power-domains:
items:
- description: XUSBC power domain (for Host and USB 2.0)
- description: XUSBA power domain (for SuperSpeed)
power-domain-names:
items:
- const: xusb_host
- const: xusb_ss
dma-coherent: true
allOf:
- $ref: usb-xhci.yaml
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/tegra234-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/tegra234-mc.h>
#include <dt-bindings/power/tegra234-powergate.h>
usb@3610000 {
compatible = "nvidia,tegra234-xusb";
reg = <0x03610000 0x40000>,
<0x03600000 0x10000>,
<0x03650000 0x10000>;
reg-names = "hcd", "fpci", "bar2";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
<&bpmp TEGRA234_CLK_XUSB_FALCON>,
<&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
<&bpmp TEGRA234_CLK_XUSB_SS>,
<&bpmp TEGRA234_CLK_CLK_M>,
<&bpmp TEGRA234_CLK_XUSB_FS>,
<&bpmp TEGRA234_CLK_UTMIP_PLL>,
<&bpmp TEGRA234_CLK_CLK_M>,
<&bpmp TEGRA234_CLK_PLLE>;
clock-names = "xusb_host", "xusb_falcon_src",
"xusb_ss", "xusb_ss_src", "xusb_hs_src",
"xusb_fs_src", "pll_u_480m", "clk_m",
"pll_e";
interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
power-domain-names = "xusb_host", "xusb_ss";
nvidia,xusb-padctl = <&xusb_padctl>;
phys = <&pad_lanes_usb2_0>;
phy-names = "usb2-0";
};