blob: e914291e63a1ae46c01bc6c3c701a8d7ed11a7ff [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Device Tree file for LX2162A-SOM
//
// Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
// Copyright 2023 Josua Mayer <josua@solid-run.com>
&crypto {
status = "okay";
};
&dpmac17 {
phy-handle = <&ethernet_phy0>;
phy-connection-type = "rgmii-id";
};
&emdio1 {
status = "okay";
ethernet_phy0: ethernet-phy@1 {
reg = <1>;
};
};
&esdhc1 {
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
status = "okay";
};
&fspi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
m25p,fast-read;
spi-max-frequency = <50000000>;
/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};
&i2c0 {
status = "okay";
fan-controller@18 {
compatible = "ti,amc6821";
reg = <0x18>;
};
ddr_spd: eeprom@51 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x51>;
read-only;
};
config_eeprom: eeprom@57 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x57>;
};
};
&i2c4 {
status = "okay";
variable_eeprom: eeprom@54 {
compatible = "st,24c2048", "atmel,24c2048";
reg = <0x54>;
};
};
&i2c5 {
status = "okay";
rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
};
};