| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra PWFM controller |
| |
| maintainers: |
| - Thierry Reding <thierry.reding@gmail.com> |
| - Jon Hunter <jonathanh@nvidia.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - enum: |
| - nvidia,tegra20-pwm |
| - nvidia,tegra186-pwm |
| |
| - items: |
| - enum: |
| - nvidia,tegra30-pwm |
| - nvidia,tegra114-pwm |
| - nvidia,tegra124-pwm |
| - nvidia,tegra132-pwm |
| - nvidia,tegra210-pwm |
| - enum: |
| - nvidia,tegra20-pwm |
| |
| - items: |
| - const: nvidia,tegra194-pwm |
| - const: nvidia,tegra186-pwm |
| |
| - items: |
| - const: nvidia,tegra234-pwm |
| - const: nvidia,tegra194-pwm |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| resets: |
| items: |
| - description: module reset |
| |
| reset-names: |
| items: |
| - const: pwm |
| |
| "#pwm-cells": |
| const: 2 |
| |
| pinctrl-names: |
| items: |
| - const: default |
| - const: sleep |
| |
| pinctrl-0: |
| description: configuration for the default/active state |
| |
| pinctrl-1: |
| description: configuration for the sleep state |
| |
| operating-points-v2: true |
| |
| power-domains: |
| items: |
| - description: phandle to the core power domain |
| |
| allOf: |
| - $ref: pwm.yaml |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - resets |
| - reset-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/tegra20-car.h> |
| |
| pwm: pwm@7000a000 { |
| compatible = "nvidia,tegra20-pwm"; |
| reg = <0x7000a000 0x100>; |
| #pwm-cells = <2>; |
| clocks = <&tegra_car TEGRA20_CLK_PWM>; |
| resets = <&tegra_car 17>; |
| reset-names = "pwm"; |
| }; |
