blob: ad45fd00ae346e4a4a42659f466589718f6a6dff [file] [log] [blame]
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm QCS404 Peripheral Authentication Service
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
description:
Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots
firmware on the Qualcomm DSP Hexagon cores.
properties:
compatible:
enum:
- qcom,qcs404-adsp-pas
- qcom,qcs404-cdsp-pas
- qcom,qcs404-wcss-pas
reg:
maxItems: 1
clocks:
items:
- description: XO clock
clock-names:
items:
- const: xo
interrupts:
maxItems: 5
interrupt-names:
maxItems: 5
power-domains: false
power-domain-names: false
smd-edge: false
memory-region:
maxItems: 1
description: Reference to the reserved-memory for the Hexagon core
firmware-name:
maxItems: 1
description: Firmware name for the Hexagon core
required:
- compatible
- reg
- memory-region
allOf:
- $ref: /schemas/remoteproc/qcom,pas-common.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
remoteproc@c700000 {
compatible = "qcom,qcs404-adsp-pas";
reg = <0x0c700000 0x4040>;
clocks = <&xo_board>;
clock-names = "xo";
interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
memory-region = <&adsp_fw_mem>;
qcom,smem-states = <&adsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
glink-edge {
interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
qcom,remote-pid = <2>;
mboxes = <&apcs_glb 8>;
label = "adsp";
};
};