blob: d82e65e37cc0c9a00a119ddd72db0803404ed225 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Nuvoton NPCM Reset controller
maintainers:
- Tomer Maimon <tmaimon77@gmail.com>
properties:
compatible:
enum:
- nuvoton,npcm750-reset # Poleg NPCM7XX SoC
- nuvoton,npcm845-reset # Arbel NPCM8XX SoC
reg:
maxItems: 1
'#reset-cells':
const: 2
nuvoton,sysgcr:
$ref: /schemas/types.yaml#/definitions/phandle
description: a phandle to access GCR registers.
nuvoton,sw-reset-number:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 4
description: |
Contains the software reset number to restart the SoC.
If not specified, software reset is disabled.
required:
- compatible
- reg
- '#reset-cells'
- nuvoton,sysgcr
additionalProperties: false
examples:
- |
#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
rstc: rstc@f0801000 {
compatible = "nuvoton,npcm750-reset";
reg = <0xf0801000 0x70>;
#reset-cells = <2>;
nuvoton,sysgcr = <&gcr>;
nuvoton,sw-reset-number = <2>;
};
// Specifying reset lines connected to IP NPCM7XX modules
spi0: spi {
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
};