blob: c6e661e8915ca4d3e905331299d981f4d3964314 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra XUSB device mode controller (XUDC)
description:
The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
USB 3.0 SuperSpeed protocols.
maintainers:
- Nagarjuna Kristam <nkristam@nvidia.com>
- JC Kuo <jckuo@nvidia.com>
- Thierry Reding <treding@nvidia.com>
properties:
compatible:
items:
- enum:
- nvidia,tegra210-xudc # For Tegra210
- nvidia,tegra186-xudc # For Tegra186
- nvidia,tegra194-xudc # For Tegra194
- nvidia,tegra234-xudc # For Tegra234
reg:
minItems: 2
items:
- description: XUSB device controller registers
- description: XUSB device PCI Config registers
- description: XUSB device registers.
reg-names:
minItems: 2
items:
- const: base
- const: fpci
- const: ipfs
interrupts:
maxItems: 1
description: Must contain the XUSB device interrupt.
clocks:
minItems: 4
items:
- description: Clock to enable core XUSB dev clock.
- description: Clock to enable XUSB super speed clock.
- description: Clock to enable XUSB super speed dev clock.
- description: Clock to enable XUSB high speed dev clock.
- description: Clock to enable XUSB full speed dev clock.
clock-names:
minItems: 4
items:
- const: dev
- const: ss
- const: ss_src
- const: fs_src
- const: hs_src
interconnects:
items:
- description: memory read client
- description: memory write client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
power-domains:
items:
- description: XUSBB(device) power-domain
- description: XUSBA(superspeed) power-domain
power-domain-names:
items:
- const: dev
- const: ss
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to the XUSB pad controller that is used to configure the USB pads
used by the XUDC controller.
phys:
minItems: 1
maxItems: 2
description:
Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
phy-names:
minItems: 1
items:
- const: usb2-0
- const: usb3-0
avddio-usb-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvdd-usb-supply:
description: USB controller power supply. Must supply 3.3 V.
dma-coherent: true
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
- power-domains
- power-domain-names
- nvidia,xusb-padctl
- phys
- phy-names
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra210-xudc
then:
properties:
reg:
minItems: 3
reg-names:
minItems: 3
clocks:
minItems: 5
clock-names:
minItems: 5
required:
- avddio-usb-supply
- hvdd-usb-supply
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra186-xudc
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
properties:
reg:
maxItems: 2
reg-names:
maxItems: 2
clocks:
maxItems: 4
clock-names:
maxItems: 4
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
required:
- dma-coherent
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
reg = <0x700d0000 0x8000>,
<0x700d8000 0x1000>,
<0x700d9000 0x1000>;
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
phys = <&micro_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_pex_1v05>;
hvdd-usb-supply = <&vdd_3v3_sys>;
};