blob: c1812d1ef06a302a502f61439115f35166ffbd8a [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874),
* connected to an Advantech IDK-2121WR 21.5" LVDS panel
*
* Copyright (C) 2019 Renesas Electronics Corp.
*/
#include "r8a774c0-ek874.dts"
/ {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm5 0 50000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
power-supply = <&reg_12p0v>;
enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
};
panel-lvds {
compatible = "advantech,idk-2121wr", "panel-lvds";
width-mm = <476>;
height-mm = <268>;
data-mapping = "vesa-24";
panel-timing {
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hsync-len = <44>;
hfront-porch = <88>;
hback-porch = <148>;
vfront-porch = <4>;
vback-porch = <36>;
vsync-len = <5>;
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
panel_in0: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
panel_in1: endpoint {
remote-endpoint = <&lvds1_out>;
};
};
};
};
};
&gpio0 {
/*
* When GP0_17 is low LVDS[01] are connected to the LVDS connector
* When GP0_17 is high LVDS[01] are connected to the LT8918L
*/
lvds-connector-en-hog {
gpio-hog;
gpios = <17 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "lvds-connector-en-gpio";
};
};
&lvds0 {
ports {
port@1 {
lvds0_out: endpoint {
remote-endpoint = <&panel_in0>;
};
};
};
};
&lvds1 {
status = "okay";
clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
clock-names = "fck", "dclkin.0", "extal";
ports {
port@1 {
lvds1_out: endpoint {
remote-endpoint = <&panel_in1>;
};
};
};
};
&pfc {
pwm5_pins: pwm5 {
groups = "pwm5_a";
function = "pwm5";
};
};
&pwm5 {
pinctrl-0 = <&pwm5_pins>;
pinctrl-names = "default";
status = "okay";
};