Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip FPGA {Q,}SPI Controllers

description:
  SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/
  fabric IP cores they are based on

maintainers:
  - Conor Dooley <conor.dooley@microchip.com>

allOf:
  - $ref: spi-controller.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - const: microchip,mpfs-qspi
          - const: microchip,coreqspi-rtl-v2
      - const: microchip,coreqspi-rtl-v2 # FPGA QSPI
      - const: microchip,mpfs-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clock-names:
    maxItems: 1

  clocks:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks

unevaluatedProperties: false

examples:
  - |
    #include "dt-bindings/clock/microchip,mpfs-clock.h"
    spi@20108000 {
        compatible = "microchip,mpfs-spi";
        reg = <0x20108000 0x1000>;
        clocks = <&clkcfg CLK_SPI0>;
        interrupt-parent = <&plic>;
        interrupts = <54>;
    };
...