| NVIDIA Tegra xHCI controller |
| ============================ |
| |
| The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by |
| the Tegra XUSB pad controller. |
| |
| Required properties: |
| -------------------- |
| - compatible: Must be: |
| - Tegra124: "nvidia,tegra124-xusb" |
| - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb" |
| - Tegra210: "nvidia,tegra210-xusb" |
| - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI |
| registers and XUSB IPFS registers. |
| - reg-names: Must contain the following entries: |
| - "hcd" |
| - "fpci" |
| - "ipfs" |
| - interrupts: Must contain the xHCI host interrupt and the mailbox interrupt. |
| - clocks: Must contain an entry for each entry in clock-names. |
| See ../clock/clock-bindings.txt for details. |
| - clock-names: Must include the following entries: |
| - xusb_host |
| - xusb_host_src |
| - xusb_falcon_src |
| - xusb_ss |
| - xusb_ss_src |
| - xusb_ss_div2 |
| - xusb_hs_src |
| - xusb_fs_src |
| - pll_u_480m |
| - clk_m |
| - pll_e |
| - resets: Must contain an entry for each entry in reset-names. |
| See ../reset/reset.txt for details. |
| - reset-names: Must include the following entries: |
| - xusb_host |
| - xusb_ss |
| - xusb_src |
| Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src. |
| - nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to |
| configure the USB pads used by the XHCI controller |
| |
| For Tegra124 and Tegra132: |
| - avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. |
| - dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V. |
| - avdd-usb-supply: USB controller power supply. Must supply 3.3 V. |
| - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. |
| - avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. |
| - avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. |
| - hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V. |
| - hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V. |
| |
| For Tegra210: |
| - dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. |
| - hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V. |
| - avdd-usb-supply: USB controller power supply. Must supply 3.3 V. |
| - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. |
| - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. |
| - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. |
| - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V. |
| - power-domains: A list of PM domain specifiers that reference each power-domain |
| used by the xHCI controller. This list must comprise of a specifier for the |
| XUSBA and XUSBC power-domains. See ../power/power_domain.txt and |
| ../arm/tegra/nvidia,tegra20-pmc.txt for details. |
| - power-domain-names: A list of names that represent each of the specifiers in |
| the 'power-domains' property. Must include 'xusb_ss' and 'xusb_host' which |
| represent the power-domains XUSBA and XUSBC, respectively. See |
| ../power/power_domain.txt for details. |
| |
| Optional properties: |
| -------------------- |
| - phys: Must contain an entry for each entry in phy-names. |
| See ../phy/phy-bindings.txt for details. |
| - phy-names: Should include an entry for each PHY used by the controller. The |
| following PHYs are available: |
| - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1 |
| - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1 |
| - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, |
| usb3-3 |
| |
| Example: |
| -------- |
| |
| usb@0,70090000 { |
| compatible = "nvidia,tegra124-xusb"; |
| reg = <0x0 0x70090000 0x0 0x8000>, |
| <0x0 0x70098000 0x0 0x1000>, |
| <0x0 0x70099000 0x0 0x1000>; |
| reg-names = "hcd", "fpci", "ipfs"; |
| |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| |
| clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>, |
| <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>, |
| <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>, |
| <&tegra_car TEGRA124_CLK_XUSB_SS>, |
| <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>, |
| <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>, |
| <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>, |
| <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>, |
| <&tegra_car TEGRA124_CLK_PLL_U_480M>, |
| <&tegra_car TEGRA124_CLK_CLK_M>, |
| <&tegra_car TEGRA124_CLK_PLL_E>; |
| clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src", |
| "xusb_ss", "xusb_ss_div2", "xusb_ss_src", |
| "xusb_hs_src", "xusb_fs_src", "pll_u_480m", |
| "clk_m", "pll_e"; |
| resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>; |
| reset-names = "xusb_host", "xusb_ss", "xusb_src"; |
| |
| nvidia,xusb-padctl = <&padctl>; |
| |
| phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */ |
| <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */ |
| <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */ |
| phy-names = "usb2-1", "usb2-2", "usb3-0"; |
| |
| avddio-pex-supply = <&vdd_1v05_run>; |
| dvddio-pex-supply = <&vdd_1v05_run>; |
| avdd-usb-supply = <&vdd_3v3_lp0>; |
| avdd-pll-utmip-supply = <&vddio_1v8>; |
| avdd-pll-erefe-supply = <&avdd_1v05_run>; |
| avdd-usb-ss-pll-supply = <&vdd_1v05_run>; |
| hvdd-usb-ss-supply = <&vdd_3v3_lp0>; |
| hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; |
| }; |