| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: SPI-NAND flash controller for MediaTek ARM SoCs |
| |
| maintainers: |
| - Chuanhong Guo <gch981213@gmail.com> |
| |
| description: | |
| The Mediatek SPI-NAND flash controller is an extended version of |
| the Mediatek NAND flash controller. It can perform standard SPI |
| instructions with one continuous write and one read for up-to 0xa0 |
| bytes. It also supports typical SPI-NAND page cache operations |
| in single, dual or quad IO mode with pipelined ECC encoding/decoding |
| using the accompanying ECC engine. There should be only one spi |
| slave device following generic spi bindings. |
| |
| properties: |
| compatible: |
| enum: |
| - mediatek,mt7622-snand |
| - mediatek,mt7629-snand |
| - mediatek,mt7986-snand |
| |
| reg: |
| items: |
| - description: core registers |
| |
| interrupts: |
| items: |
| - description: NFI interrupt |
| |
| clocks: |
| minItems: 2 |
| maxItems: 3 |
| |
| clock-names: |
| minItems: 2 |
| maxItems: 3 |
| |
| nand-ecc-engine: |
| description: device-tree node of the accompanying ECC engine. |
| $ref: /schemas/types.yaml#/definitions/phandle |
| |
| mediatek,rx-latch-latency-ns: |
| description: Data read latch latency, unit is nanoseconds. |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| - nand-ecc-engine |
| |
| allOf: |
| - $ref: /schemas/spi/spi-controller.yaml# |
| - if: |
| properties: |
| compatible: |
| enum: |
| - mediatek,mt7622-snand |
| - mediatek,mt7629-snand |
| then: |
| properties: |
| clocks: |
| items: |
| - description: clock used for the controller |
| - description: clock used for the SPI bus |
| clock-names: |
| items: |
| - const: nfi_clk |
| - const: pad_clk |
| |
| - if: |
| properties: |
| compatible: |
| enum: |
| - mediatek,mt7986-snand |
| then: |
| properties: |
| clocks: |
| items: |
| - description: clock used for the controller |
| - description: clock used for the SPI bus |
| - description: clock used for the AHB bus |
| clock-names: |
| items: |
| - const: nfi_clk |
| - const: pad_clk |
| - const: nfi_hclk |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/mt7622-clk.h> |
| soc { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| snfi: spi@1100d000 { |
| compatible = "mediatek,mt7622-snand"; |
| reg = <0 0x1100d000 0 0x1000>; |
| interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; |
| clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>; |
| clock-names = "nfi_clk", "pad_clk"; |
| nand-ecc-engine = <&bch>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| flash@0 { |
| compatible = "spi-nand"; |
| reg = <0>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| nand-ecc-engine = <&snfi>; |
| }; |
| }; |
| }; |