| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (c) 2018 MediaTek Inc. |
| * Author: Owen Chen <owen.chen@mediatek.com> |
| */ |
| |
| #include <linux/clk-provider.h> |
| #include <linux/platform_device.h> |
| |
| #include "clk-mtk.h" |
| #include "clk-gate.h" |
| |
| #include <dt-bindings/clock/mt6765-clk.h> |
| |
| static const struct mtk_gate_regs venc_cg_regs = { |
| .set_ofs = 0x4, |
| .clr_ofs = 0x8, |
| .sta_ofs = 0x0, |
| }; |
| |
| #define GATE_VENC(_id, _name, _parent, _shift) \ |
| GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) |
| |
| static const struct mtk_gate venc_clks[] = { |
| GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "mm_ck", 0), |
| GATE_VENC(CLK_VENC_SET1_VENC, "venc_set1_venc", "mm_ck", 4), |
| GATE_VENC(CLK_VENC_SET2_JPGENC, "jpgenc", "mm_ck", 8), |
| GATE_VENC(CLK_VENC_SET3_VDEC, "venc_set3_vdec", "mm_ck", 12), |
| }; |
| |
| static const struct mtk_clk_desc venc_desc = { |
| .clks = venc_clks, |
| .num_clks = ARRAY_SIZE(venc_clks), |
| }; |
| |
| static const struct of_device_id of_match_clk_mt6765_vcodec[] = { |
| { |
| .compatible = "mediatek,mt6765-vcodecsys", |
| .data = &venc_desc, |
| }, { |
| /* sentinel */ |
| } |
| }; |
| MODULE_DEVICE_TABLE(of, of_match_clk_mt6765_vcodec); |
| |
| static struct platform_driver clk_mt6765_vcodec_drv = { |
| .probe = mtk_clk_simple_probe, |
| .remove_new = mtk_clk_simple_remove, |
| .driver = { |
| .name = "clk-mt6765-vcodec", |
| .of_match_table = of_match_clk_mt6765_vcodec, |
| }, |
| }; |
| module_platform_driver(clk_mt6765_vcodec_drv); |
| |
| MODULE_DESCRIPTION("MediaTek MT6765 Video Codec clocks driver"); |
| MODULE_LICENSE("GPL"); |