arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2018-2020 NXP
 *	Dong Aisheng <aisheng.dong@nxp.com>
 */

&lsio_gpio0 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 1 56 12>,
		      <&iomuxc 13 69 4>,
		      <&iomuxc 19 75 4>,
		      <&iomuxc 24 80 1>,
		      <&iomuxc 25 82 7>;
};

&lsio_gpio1 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 0 89 9>,
		      <&iomuxc 9 99 16>,
		      <&iomuxc 25 116 7>;
};

&lsio_gpio2 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 0 123 1>,
		      <&iomuxc 1 126 2>,
		      <&iomuxc 3 129 1>;
};

&lsio_gpio3 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 0 146 4>,
		      <&iomuxc 4 151 13>,
		      <&iomuxc 17 165 8>;
};

&lsio_gpio4 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 0 0 3>,
		      <&iomuxc 3 4 4>,
		      <&iomuxc 7 9 6>,
		      <&iomuxc 13 16 6>,
		      <&iomuxc 19 23 2>,
		      <&iomuxc 21 26 2>,
		      <&iomuxc 23 30 6>,
		      <&iomuxc 29 37 3>;
};

&lsio_gpio5 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
	gpio-ranges = <&iomuxc 0 40 3>,
		      <&iomuxc 3 44 6>,
		      <&iomuxc 9 51 3>;
};

&lsio_gpio6 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
};

&lsio_gpio7 {
	compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
};

&lsio_mu0 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu1 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu2 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu3 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu4 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu5 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu6 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};

&lsio_mu13 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
};