Documentation/devicetree/bindings/pinctrl/qcom,apq8084-pinctrl.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,apq8084-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. APQ8084 TLMM block

maintainers:
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description: |
  Top Level Mode Multiplexer pin controller in Qualcomm APQ8084 SoC.

allOf:
  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#

properties:
  compatible:
    const: qcom,apq8084-pinctrl

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  gpio-reserved-ranges: true

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-apq8084-tlmm-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-apq8084-tlmm-state"
        additionalProperties: false

$defs:
  qcom-apq8084-tlmm-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
    unevaluatedProperties: false

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          oneOf:
            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-6])$"
            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
                      sdc2_data ]
        minItems: 1
        maxItems: 36

      function:
        description:
          Specify the alternative function to be configured for the specified
          pins.
        enum: [ adsp_ext, audio_ref, blsp_i2c1, blsp_i2c2, blsp_i2c3,
                blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8,
                blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12,
                blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3,
                blsp_spi2, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2,
                blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6,
                blsp_spi7, blsp_spi8, blsp_spi9, blsp_spi10,
                blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
                blsp_spi11, blsp_spi12, blsp_uart1, blsp_uart2,
                blsp_uart3, blsp_uart4, blsp_uart5, blsp_uart6,
                blsp_uart7, blsp_uart8, blsp_uart9, blsp_uart10,
                blsp_uart11, blsp_uart12, blsp_uim1, blsp_uim2,
                blsp_uim3, blsp_uim4, blsp_uim5, blsp_uim6, blsp_uim7,
                blsp_uim8, blsp_uim9, blsp_uim10, blsp_uim11,
                blsp_uim12, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,
                cci_async, cci_async_in0, cci_i2c0, cci_i2c1,
                cci_timer0, cci_timer1, cci_timer2, cci_timer3,
                cci_timer4, edp_hpd, gcc_gp1, gcc_gp2, gcc_gp3,
                gcc_obt, gcc_vtt, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2,
                gp0_clk, gp1_clk, gpio, hdmi_cec, hdmi_ddc, hdmi_dtest,
                hdmi_hpd, hdmi_rcv, hsic, ldo_en, ldo_update,
                mdp_vsync, pci_e0, pci_e0_n, pci_e0_rst, pci_e1,
                pci_e1_rst, pci_e1_rst_n, pci_e1_clkreq_n, pri_mi2s,
                qua_mi2s, sata_act, sata_devsleep, sata_devsleep_n,
                sd_write, sdc_emmc_mode, sdc3, sdc4, sec_mi2s, slimbus,
                spdif_tx, spkr_i2s, spkr_i2s_ws, spss_geni, ter_mi2s,
                tsif1, tsif2, uim, uim_batt_alarm ]

    required:
      - pins

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    tlmm: pinctrl@fd510000 {
        compatible = "qcom,apq8084-pinctrl";
        reg = <0xfd510000 0x4000>;

        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&tlmm 0 0 147>;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

        uart-state {
            rx-pins {
                pins = "gpio5";
                function = "blsp_uart2";
                bias-pull-up;
            };

            tx-pins {
                pins = "gpio4";
                function = "blsp_uart2";
                bias-disable;
            };
        };
    };