| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_NIF_RTR_CTRL_0_REGS_H_ |
| #define ASIC_REG_NIF_RTR_CTRL_0_REGS_H_ |
| |
| /* |
| ***************************************** |
| * NIF_RTR_CTRL_0 (Prototype: RTR_CTRL) |
| ***************************************** |
| */ |
| |
| #define mmNIF_RTR_CTRL_0_PERM_SEL 0x386108 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_0 0x386114 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_1 0x386118 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_2 0x38611C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_3 0x386120 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_4 0x386124 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_5 0x386128 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_6 0x38612C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_7 0x386130 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_8 0x386134 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_9 0x386138 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_10 0x38613C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_11 0x386140 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_12 0x386144 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_13 0x386148 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_14 0x38614C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_15 0x386150 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_16 0x386154 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_17 0x386158 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_18 0x38615C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_19 0x386160 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_20 0x386164 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_21 0x386168 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_22 0x38616C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_23 0x386170 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_24 0x386174 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_25 0x386178 |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_26 0x38617C |
| |
| #define mmNIF_RTR_CTRL_0_HBM_POLY_H3_27 0x386180 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_0 0x386184 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_1 0x386188 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_2 0x38618C |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_3 0x386190 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_4 0x386194 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_5 0x386198 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_6 0x38619C |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_7 0x3861A0 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_8 0x3861A4 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_9 0x3861A8 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_10 0x3861AC |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_11 0x3861B0 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_12 0x3861B4 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_13 0x3861B8 |
| |
| #define mmNIF_RTR_CTRL_0_SRAM_POLY_H3_14 0x3861BC |
| |
| #define mmNIF_RTR_CTRL_0_SCRAM_SRAM_EN 0x38626C |
| |
| #define mmNIF_RTR_CTRL_0_RL_HBM_EN 0x386274 |
| |
| #define mmNIF_RTR_CTRL_0_RL_HBM_SAT 0x386278 |
| |
| #define mmNIF_RTR_CTRL_0_RL_HBM_RST 0x38627C |
| |
| #define mmNIF_RTR_CTRL_0_RL_HBM_TIMEOUT 0x386280 |
| |
| #define mmNIF_RTR_CTRL_0_SCRAM_HBM_EN 0x386284 |
| |
| #define mmNIF_RTR_CTRL_0_RL_PCI_EN 0x386288 |
| |
| #define mmNIF_RTR_CTRL_0_RL_PCI_SAT 0x38628C |
| |
| #define mmNIF_RTR_CTRL_0_RL_PCI_RST 0x386290 |
| |
| #define mmNIF_RTR_CTRL_0_RL_PCI_TIMEOUT 0x386294 |
| |
| #define mmNIF_RTR_CTRL_0_RL_SRAM_EN 0x38629C |
| |
| #define mmNIF_RTR_CTRL_0_RL_SRAM_SAT 0x3862A0 |
| |
| #define mmNIF_RTR_CTRL_0_RL_SRAM_RST 0x3862A4 |
| |
| #define mmNIF_RTR_CTRL_0_RL_SRAM_TIMEOUT 0x3862AC |
| |
| #define mmNIF_RTR_CTRL_0_RL_SRAM_RED 0x3862B4 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_HBM_EN 0x3862EC |
| |
| #define mmNIF_RTR_CTRL_0_E2E_PCI_EN 0x3862F0 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_HBM_WR_SIZE 0x3862F4 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_PCI_WR_SIZE 0x3862F8 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET_EN 0x386404 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET 0x386408 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_PCI_CTR_WRAP 0x38640C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_PCI_CTR_CNT 0x386410 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET_EN 0x386414 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET 0x386418 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_HBM_RD_SIZE 0x38641C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_PCI_RD_SIZE 0x386420 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET_EN 0x386424 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET 0x386428 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_PCI_CTR_WRAP 0x38642C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_PCI_CTR_CNT 0x386430 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET_EN 0x386434 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET 0x386438 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_SEL_0 0x386450 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_SEL_1 0x386454 |
| |
| #define mmNIF_RTR_CTRL_0_NON_LIN_EN 0x386480 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_BANK_0 0x386500 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_BANK_1 0x386504 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_BANK_2 0x386508 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_BANK_3 0x38650C |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_BANK_4 0x386510 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_0 0x386514 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_1 0x386520 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_2 0x386524 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_3 0x386528 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_4 0x38652C |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_5 0x386530 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_6 0x386534 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_7 0x386538 |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_8 0x38653C |
| |
| #define mmNIF_RTR_CTRL_0_NL_SRAM_OFFSET_9 0x386540 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_0 0x386550 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_1 0x386554 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_2 0x386558 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_3 0x38655C |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_4 0x386560 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_5 0x386564 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_6 0x386568 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_7 0x38656C |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_8 0x386570 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_9 0x386574 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_10 0x386578 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_11 0x38657C |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_12 0x386580 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_13 0x386584 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_14 0x386588 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_15 0x38658C |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_16 0x386590 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_17 0x386594 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_OFFSET_18 0x386598 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_0 0x3865E4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_1 0x3865E8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_2 0x3865EC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_3 0x3865F0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_4 0x3865F4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_5 0x3865F8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_6 0x3865FC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_7 0x386600 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_8 0x386604 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_9 0x386608 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_10 0x38660C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_11 0x386610 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_12 0x386614 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_13 0x386618 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_14 0x38661C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_15 0x386620 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_0 0x386624 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_1 0x386628 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_2 0x38662C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_3 0x386630 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_4 0x386634 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_5 0x386638 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_6 0x38663C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_7 0x386640 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_8 0x386644 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_9 0x386648 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_10 0x38664C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_11 0x386650 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_12 0x386654 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_13 0x386658 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_14 0x38665C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_15 0x386660 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_0 0x386664 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_1 0x386668 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_2 0x38666C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_3 0x386670 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_4 0x386674 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_5 0x386678 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_6 0x38667C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_7 0x386680 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_8 0x386684 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_9 0x386688 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_10 0x38668C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_11 0x386690 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_12 0x386694 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_13 0x386698 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_14 0x38669C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_15 0x3866A0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_0 0x3866A4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_1 0x3866A8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_2 0x3866AC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_3 0x3866B0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_4 0x3866B4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_5 0x3866B8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_6 0x3866BC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_7 0x3866C0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_8 0x3866C4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_9 0x3866C8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_10 0x3866CC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_11 0x3866D0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_12 0x3866D4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_13 0x3866D8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_14 0x3866DC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_15 0x3866E0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_0 0x3866E4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_1 0x3866E8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_2 0x3866EC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_3 0x3866F0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_4 0x3866F4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_5 0x3866F8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_6 0x3866FC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_7 0x386700 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_8 0x386704 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_9 0x386708 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_10 0x38670C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_11 0x386710 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_12 0x386714 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_13 0x386718 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_14 0x38671C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_15 0x386720 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_0 0x386724 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_1 0x386728 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_2 0x38672C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_3 0x386730 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_4 0x386734 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_5 0x386738 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_6 0x38673C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_7 0x386740 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_8 0x386744 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_9 0x386748 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_10 0x38674C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_11 0x386750 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_12 0x386754 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_13 0x386758 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_14 0x38675C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_15 0x386760 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_0 0x386764 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_1 0x386768 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_2 0x38676C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_3 0x386770 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_4 0x386774 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_5 0x386778 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_6 0x38677C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_7 0x386780 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_8 0x386784 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_9 0x386788 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_10 0x38678C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_11 0x386790 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_12 0x386794 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_13 0x386798 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_14 0x38679C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_15 0x3867A0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_0 0x3867A4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_1 0x3867A8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_2 0x3867AC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_3 0x3867B0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_4 0x3867B4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_5 0x3867B8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_6 0x3867BC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_7 0x3867C0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_8 0x3867C4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_9 0x3867C8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_10 0x3867CC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_11 0x3867D0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_12 0x3867D4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_13 0x3867D8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_14 0x3867DC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_15 0x3867E0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_0 0x386824 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_1 0x386828 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_2 0x38682C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_3 0x386830 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_4 0x386834 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_5 0x386838 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_6 0x38683C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_7 0x386840 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_8 0x386844 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_9 0x386848 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_10 0x38684C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_11 0x386850 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_12 0x386854 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_13 0x386858 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_14 0x38685C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_15 0x386860 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_0 0x386864 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_1 0x386868 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_2 0x38686C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_3 0x386870 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_4 0x386874 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_5 0x386878 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_6 0x38687C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_7 0x386880 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_8 0x386884 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_9 0x386888 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_10 0x38688C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_11 0x386890 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_12 0x386894 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_13 0x386898 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_14 0x38689C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_15 0x3868A0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_0 0x3868A4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_1 0x3868A8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_2 0x3868AC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_3 0x3868B0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_4 0x3868B4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_5 0x3868B8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_6 0x3868BC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_7 0x3868C0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_8 0x3868C4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_9 0x3868C8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_10 0x3868CC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_11 0x3868D0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_12 0x3868D4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_13 0x3868D8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_14 0x3868DC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_15 0x3868E0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_0 0x3868E4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_1 0x3868E8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_2 0x3868EC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_3 0x3868F0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_4 0x3868F4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_5 0x3868F8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_6 0x3868FC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_7 0x386900 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_8 0x386904 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_9 0x386908 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_10 0x38690C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_11 0x386910 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_12 0x386914 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_13 0x386918 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_14 0x38691C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_15 0x386920 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_0 0x386924 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_1 0x386928 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_2 0x38692C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_3 0x386930 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_4 0x386934 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_5 0x386938 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_6 0x38693C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_7 0x386940 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_8 0x386944 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_9 0x386948 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_10 0x38694C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_11 0x386950 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_12 0x386954 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_13 0x386958 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_14 0x38695C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_15 0x386960 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_0 0x386964 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_1 0x386968 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_2 0x38696C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_3 0x386970 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_4 0x386974 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_5 0x386978 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_6 0x38697C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_7 0x386980 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_8 0x386984 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_9 0x386988 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_10 0x38698C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_11 0x386990 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_12 0x386994 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_13 0x386998 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_14 0x38699C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_15 0x3869A0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_0 0x3869A4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_1 0x3869A8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_2 0x3869AC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_3 0x3869B0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_4 0x3869B4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_5 0x3869B8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_6 0x3869BC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_7 0x3869C0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_8 0x3869C4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_9 0x3869C8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_10 0x3869CC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_11 0x3869D0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_12 0x3869D4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_13 0x3869D8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_14 0x3869DC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_15 0x3869E0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_0 0x3869E4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_1 0x3869E8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_2 0x3869EC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_3 0x3869F0 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_4 0x3869F4 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_5 0x3869F8 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_6 0x3869FC |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_7 0x386A00 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_8 0x386A04 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_9 0x386A08 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_10 0x386A0C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_11 0x386A10 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_12 0x386A14 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_13 0x386A18 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_14 0x386A1C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_15 0x386A20 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_HIT_AW 0x386A64 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_SEC_HIT_AR 0x386A68 |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_HIT_AW 0x386A6C |
| |
| #define mmNIF_RTR_CTRL_0_RANGE_PRIV_HIT_AR 0x386A70 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_CFG 0x386B64 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_SHIFT 0x386B68 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_0 0x386B6C |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_1 0x386B70 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_2 0x386B74 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_3 0x386B78 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_4 0x386B7C |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_5 0x386B80 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_6 0x386B84 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_EXPECTED_LAT_7 0x386B88 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_0 0x386BAC |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_1 0x386BB0 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_2 0x386BB4 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_3 0x386BB8 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_4 0x386BBC |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_5 0x386BC0 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_6 0x386BC4 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_TOKEN_7 0x386BC8 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_0 0x386BEC |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_1 0x386BF0 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_2 0x386BF4 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_3 0x386BF8 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_4 0x386BFC |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_5 0x386C00 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_6 0x386C04 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_BANK_ID_7 0x386C08 |
| |
| #define mmNIF_RTR_CTRL_0_RGL_WDT 0x386C2C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_WRAP 0x386C30 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_WRAP 0x386C34 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_WRAP 0x386C38 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_WRAP 0x386C3C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_WRAP 0x386C40 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_WRAP 0x386C44 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_WRAP 0x386C48 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_WRAP 0x386C4C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_CNT 0x386C50 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_CNT 0x386C54 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_CNT 0x386C58 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_CNT 0x386C5C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_CNT 0x386C60 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_CNT 0x386C64 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_CNT 0x386C68 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_CNT 0x386C6C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_WRAP 0x386C70 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_WRAP 0x386C74 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_WRAP 0x386C78 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_WRAP 0x386C7C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_WRAP 0x386C80 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_WRAP 0x386C84 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_WRAP 0x386C88 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_WRAP 0x386C8C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_CNT 0x386C90 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_CNT 0x386C94 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_CNT 0x386C98 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_CNT 0x386C9C |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_CNT 0x386CA0 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_CNT 0x386CA4 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_CNT 0x386CA8 |
| |
| #define mmNIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_CNT 0x386CAC |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_PC_SEL_0 0x386CB0 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_PC_SEL_1 0x386CB4 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_PC_SEL_2 0x386CB8 |
| |
| #define mmNIF_RTR_CTRL_0_NL_HBM_PC_SEL_3 0x386CBC |
| |
| #endif /* ASIC_REG_NIF_RTR_CTRL_0_REGS_H_ */ |
