| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_NIF_RTR_CTRL_1_REGS_H_ |
| #define ASIC_REG_NIF_RTR_CTRL_1_REGS_H_ |
| |
| /* |
| ***************************************** |
| * NIF_RTR_CTRL_1 (Prototype: RTR_CTRL) |
| ***************************************** |
| */ |
| |
| #define mmNIF_RTR_CTRL_1_PERM_SEL 0x396108 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_0 0x396114 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_1 0x396118 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_2 0x39611C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_3 0x396120 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_4 0x396124 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_5 0x396128 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_6 0x39612C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_7 0x396130 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_8 0x396134 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_9 0x396138 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_10 0x39613C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_11 0x396140 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_12 0x396144 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_13 0x396148 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_14 0x39614C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_15 0x396150 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_16 0x396154 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_17 0x396158 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_18 0x39615C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_19 0x396160 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_20 0x396164 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_21 0x396168 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_22 0x39616C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_23 0x396170 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_24 0x396174 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_25 0x396178 |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_26 0x39617C |
| |
| #define mmNIF_RTR_CTRL_1_HBM_POLY_H3_27 0x396180 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_0 0x396184 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_1 0x396188 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_2 0x39618C |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_3 0x396190 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_4 0x396194 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_5 0x396198 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_6 0x39619C |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_7 0x3961A0 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_8 0x3961A4 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_9 0x3961A8 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_10 0x3961AC |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_11 0x3961B0 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_12 0x3961B4 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_13 0x3961B8 |
| |
| #define mmNIF_RTR_CTRL_1_SRAM_POLY_H3_14 0x3961BC |
| |
| #define mmNIF_RTR_CTRL_1_SCRAM_SRAM_EN 0x39626C |
| |
| #define mmNIF_RTR_CTRL_1_RL_HBM_EN 0x396274 |
| |
| #define mmNIF_RTR_CTRL_1_RL_HBM_SAT 0x396278 |
| |
| #define mmNIF_RTR_CTRL_1_RL_HBM_RST 0x39627C |
| |
| #define mmNIF_RTR_CTRL_1_RL_HBM_TIMEOUT 0x396280 |
| |
| #define mmNIF_RTR_CTRL_1_SCRAM_HBM_EN 0x396284 |
| |
| #define mmNIF_RTR_CTRL_1_RL_PCI_EN 0x396288 |
| |
| #define mmNIF_RTR_CTRL_1_RL_PCI_SAT 0x39628C |
| |
| #define mmNIF_RTR_CTRL_1_RL_PCI_RST 0x396290 |
| |
| #define mmNIF_RTR_CTRL_1_RL_PCI_TIMEOUT 0x396294 |
| |
| #define mmNIF_RTR_CTRL_1_RL_SRAM_EN 0x39629C |
| |
| #define mmNIF_RTR_CTRL_1_RL_SRAM_SAT 0x3962A0 |
| |
| #define mmNIF_RTR_CTRL_1_RL_SRAM_RST 0x3962A4 |
| |
| #define mmNIF_RTR_CTRL_1_RL_SRAM_TIMEOUT 0x3962AC |
| |
| #define mmNIF_RTR_CTRL_1_RL_SRAM_RED 0x3962B4 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_HBM_EN 0x3962EC |
| |
| #define mmNIF_RTR_CTRL_1_E2E_PCI_EN 0x3962F0 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_HBM_WR_SIZE 0x3962F4 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_PCI_WR_SIZE 0x3962F8 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET_EN 0x396404 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET 0x396408 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_PCI_CTR_WRAP 0x39640C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_PCI_CTR_CNT 0x396410 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET_EN 0x396414 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET 0x396418 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_HBM_RD_SIZE 0x39641C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_PCI_RD_SIZE 0x396420 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET_EN 0x396424 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET 0x396428 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_PCI_CTR_WRAP 0x39642C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_PCI_CTR_CNT 0x396430 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET_EN 0x396434 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET 0x396438 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_SEL_0 0x396450 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_SEL_1 0x396454 |
| |
| #define mmNIF_RTR_CTRL_1_NON_LIN_EN 0x396480 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_BANK_0 0x396500 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_BANK_1 0x396504 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_BANK_2 0x396508 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_BANK_3 0x39650C |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_BANK_4 0x396510 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_0 0x396514 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_1 0x396520 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_2 0x396524 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_3 0x396528 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_4 0x39652C |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_5 0x396530 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_6 0x396534 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_7 0x396538 |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_8 0x39653C |
| |
| #define mmNIF_RTR_CTRL_1_NL_SRAM_OFFSET_9 0x396540 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_0 0x396550 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_1 0x396554 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_2 0x396558 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_3 0x39655C |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_4 0x396560 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_5 0x396564 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_6 0x396568 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_7 0x39656C |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_8 0x396570 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_9 0x396574 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_10 0x396578 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_11 0x39657C |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_12 0x396580 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_13 0x396584 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_14 0x396588 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_15 0x39658C |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_16 0x396590 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_17 0x396594 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_OFFSET_18 0x396598 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_0 0x3965E4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_1 0x3965E8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_2 0x3965EC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_3 0x3965F0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_4 0x3965F4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_5 0x3965F8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_6 0x3965FC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_7 0x396600 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_8 0x396604 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_9 0x396608 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_10 0x39660C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_11 0x396610 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_12 0x396614 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_13 0x396618 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_14 0x39661C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_15 0x396620 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_0 0x396624 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_1 0x396628 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_2 0x39662C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_3 0x396630 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_4 0x396634 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_5 0x396638 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_6 0x39663C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_7 0x396640 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_8 0x396644 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_9 0x396648 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_10 0x39664C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_11 0x396650 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_12 0x396654 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_13 0x396658 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_14 0x39665C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_15 0x396660 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_0 0x396664 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_1 0x396668 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_2 0x39666C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_3 0x396670 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_4 0x396674 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_5 0x396678 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_6 0x39667C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_7 0x396680 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_8 0x396684 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_9 0x396688 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_10 0x39668C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_11 0x396690 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_12 0x396694 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_13 0x396698 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_14 0x39669C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_15 0x3966A0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_0 0x3966A4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_1 0x3966A8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_2 0x3966AC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_3 0x3966B0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_4 0x3966B4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_5 0x3966B8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_6 0x3966BC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_7 0x3966C0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_8 0x3966C4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_9 0x3966C8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_10 0x3966CC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_11 0x3966D0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_12 0x3966D4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_13 0x3966D8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_14 0x3966DC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_15 0x3966E0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_0 0x3966E4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_1 0x3966E8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_2 0x3966EC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_3 0x3966F0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_4 0x3966F4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_5 0x3966F8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_6 0x3966FC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_7 0x396700 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_8 0x396704 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_9 0x396708 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_10 0x39670C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_11 0x396710 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_12 0x396714 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_13 0x396718 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_14 0x39671C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_15 0x396720 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_0 0x396724 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_1 0x396728 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_2 0x39672C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_3 0x396730 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_4 0x396734 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_5 0x396738 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_6 0x39673C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_7 0x396740 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_8 0x396744 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_9 0x396748 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_10 0x39674C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_11 0x396750 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_12 0x396754 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_13 0x396758 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_14 0x39675C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_15 0x396760 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_0 0x396764 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_1 0x396768 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_2 0x39676C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_3 0x396770 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_4 0x396774 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_5 0x396778 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_6 0x39677C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_7 0x396780 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_8 0x396784 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_9 0x396788 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_10 0x39678C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_11 0x396790 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_12 0x396794 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_13 0x396798 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_14 0x39679C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_15 0x3967A0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_0 0x3967A4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_1 0x3967A8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_2 0x3967AC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_3 0x3967B0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_4 0x3967B4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_5 0x3967B8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_6 0x3967BC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_7 0x3967C0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_8 0x3967C4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_9 0x3967C8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_10 0x3967CC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_11 0x3967D0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_12 0x3967D4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_13 0x3967D8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_14 0x3967DC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_15 0x3967E0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_0 0x396824 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_1 0x396828 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_2 0x39682C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_3 0x396830 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_4 0x396834 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_5 0x396838 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_6 0x39683C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_7 0x396840 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_8 0x396844 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_9 0x396848 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_10 0x39684C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_11 0x396850 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_12 0x396854 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_13 0x396858 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_14 0x39685C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_15 0x396860 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_0 0x396864 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_1 0x396868 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_2 0x39686C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_3 0x396870 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_4 0x396874 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_5 0x396878 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_6 0x39687C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_7 0x396880 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_8 0x396884 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_9 0x396888 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_10 0x39688C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_11 0x396890 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_12 0x396894 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_13 0x396898 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_14 0x39689C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_15 0x3968A0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_0 0x3968A4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_1 0x3968A8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_2 0x3968AC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_3 0x3968B0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_4 0x3968B4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_5 0x3968B8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_6 0x3968BC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_7 0x3968C0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_8 0x3968C4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_9 0x3968C8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_10 0x3968CC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_11 0x3968D0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_12 0x3968D4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_13 0x3968D8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_14 0x3968DC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_15 0x3968E0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_0 0x3968E4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_1 0x3968E8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_2 0x3968EC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_3 0x3968F0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_4 0x3968F4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_5 0x3968F8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_6 0x3968FC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_7 0x396900 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_8 0x396904 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_9 0x396908 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_10 0x39690C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_11 0x396910 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_12 0x396914 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_13 0x396918 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_14 0x39691C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_15 0x396920 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_0 0x396924 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_1 0x396928 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_2 0x39692C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_3 0x396930 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_4 0x396934 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_5 0x396938 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_6 0x39693C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_7 0x396940 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_8 0x396944 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_9 0x396948 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_10 0x39694C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_11 0x396950 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_12 0x396954 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_13 0x396958 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_14 0x39695C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_15 0x396960 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_0 0x396964 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_1 0x396968 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_2 0x39696C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_3 0x396970 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_4 0x396974 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_5 0x396978 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_6 0x39697C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_7 0x396980 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_8 0x396984 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_9 0x396988 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_10 0x39698C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_11 0x396990 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_12 0x396994 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_13 0x396998 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_14 0x39699C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_15 0x3969A0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_0 0x3969A4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_1 0x3969A8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_2 0x3969AC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_3 0x3969B0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_4 0x3969B4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_5 0x3969B8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_6 0x3969BC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_7 0x3969C0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_8 0x3969C4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_9 0x3969C8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_10 0x3969CC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_11 0x3969D0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_12 0x3969D4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_13 0x3969D8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_14 0x3969DC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_15 0x3969E0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_0 0x3969E4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_1 0x3969E8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_2 0x3969EC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_3 0x3969F0 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_4 0x3969F4 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_5 0x3969F8 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_6 0x3969FC |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_7 0x396A00 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_8 0x396A04 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_9 0x396A08 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_10 0x396A0C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_11 0x396A10 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_12 0x396A14 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_13 0x396A18 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_14 0x396A1C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_15 0x396A20 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_HIT_AW 0x396A64 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_SEC_HIT_AR 0x396A68 |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_HIT_AW 0x396A6C |
| |
| #define mmNIF_RTR_CTRL_1_RANGE_PRIV_HIT_AR 0x396A70 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_CFG 0x396B64 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_SHIFT 0x396B68 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_0 0x396B6C |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_1 0x396B70 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_2 0x396B74 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_3 0x396B78 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_4 0x396B7C |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_5 0x396B80 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_6 0x396B84 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_EXPECTED_LAT_7 0x396B88 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_0 0x396BAC |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_1 0x396BB0 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_2 0x396BB4 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_3 0x396BB8 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_4 0x396BBC |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_5 0x396BC0 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_6 0x396BC4 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_TOKEN_7 0x396BC8 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_0 0x396BEC |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_1 0x396BF0 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_2 0x396BF4 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_3 0x396BF8 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_4 0x396BFC |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_5 0x396C00 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_6 0x396C04 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_BANK_ID_7 0x396C08 |
| |
| #define mmNIF_RTR_CTRL_1_RGL_WDT 0x396C2C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_WRAP 0x396C30 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_WRAP 0x396C34 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_WRAP 0x396C38 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_WRAP 0x396C3C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_WRAP 0x396C40 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_WRAP 0x396C44 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_WRAP 0x396C48 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_WRAP 0x396C4C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_CNT 0x396C50 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_CNT 0x396C54 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_CNT 0x396C58 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_CNT 0x396C5C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_CNT 0x396C60 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_CNT 0x396C64 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_CNT 0x396C68 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_CNT 0x396C6C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_WRAP 0x396C70 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_WRAP 0x396C74 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_WRAP 0x396C78 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_WRAP 0x396C7C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_WRAP 0x396C80 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_WRAP 0x396C84 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_WRAP 0x396C88 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_WRAP 0x396C8C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_CNT 0x396C90 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_CNT 0x396C94 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_CNT 0x396C98 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_CNT 0x396C9C |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_CNT 0x396CA0 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_CNT 0x396CA4 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_CNT 0x396CA8 |
| |
| #define mmNIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_CNT 0x396CAC |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_PC_SEL_0 0x396CB0 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_PC_SEL_1 0x396CB4 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_PC_SEL_2 0x396CB8 |
| |
| #define mmNIF_RTR_CTRL_1_NL_HBM_PC_SEL_3 0x396CBC |
| |
| #endif /* ASIC_REG_NIF_RTR_CTRL_1_REGS_H_ */ |
