| Freescale IRQSTEER Interrupt multiplexer |
| |
| Required properties: |
| |
| - compatible: should be: |
| - "fsl,imx8m-irqsteer" |
| - "fsl,imx-irqsteer" |
| - reg: Physical base address and size of registers. |
| - interrupts: Should contain the up to 8 parent interrupt lines used to |
| multiplex the input interrupts. They should be specified sequentially |
| from output 0 to 7. |
| - clocks: Should contain one clock for entry in clock-names |
| see Documentation/devicetree/bindings/clock/clock-bindings.txt |
| - clock-names: |
| - "ipg": main logic clock |
| - interrupt-controller: Identifies the node as an interrupt controller. |
| - #interrupt-cells: Specifies the number of cells needed to encode an |
| interrupt source. The value must be 1. |
| - fsl,channel: The output channel that all input IRQs should be steered into. |
| - fsl,num-irqs: Number of input interrupts of this channel. |
| Should be multiple of 32 input interrupts and up to 512 interrupts. |
| |
| Example: |
| |
| interrupt-controller@32e2d000 { |
| compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; |
| reg = <0x32e2d000 0x1000>; |
| interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; |
| clock-names = "ipg"; |
| fsl,channel = <0>; |
| fsl,num-irqs = <64>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| }; |