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// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "omap443x.dtsi"
#include "motorola-cpcap-mapphone.dtsi"
/ {
/*
* We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
* then 1023 - 1024 seems to contain mbm.
*/
memory {
device_type = "memory";
reg = <0x80000000 0x3fd00000>; /* 1021 MB */
};
/* Poweroff GPIO probably connected to CPCAP */
gpio-poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&poweroff_gpio>;
pinctrl-names = "default";
gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; /* gpio50 */
};
hdmi0: connector {
compatible = "hdmi-connector";
pinctrl-0 = <&hdmi_hpd_gpio>;
pinctrl-names = "default";
label = "hdmi";
type = "d";
hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio63 */
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_out>;
};
};
};
/*
* HDMI 5V regulator probably sourced from battery. Let's keep
* keep this as always enabled for HDMI to work until we've
* figured what the encoder chip is.
*/
hdmi_regulator: regulator-hdmi {
compatible = "regulator-fixed";
regulator-name = "hdmi";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio59 */
enable-active-high;
regulator-always-on;
};
/* This is probably coming straight from the battery.. */
wl12xx_vmmc: regulator-wl12xx {
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */
startup-delay-us = <70000>;
enable-active-high;
};
soundcard {
compatible = "audio-graph-card";
label = "Mapphone Audio";
widgets =
"Speaker", "Earpiece",
"Speaker", "Loudspeaker",
"Headphone", "Headphone Jack",
"Microphone", "Internal Mic";
routing =
"Earpiece", "EP",
"Loudspeaker", "SPKR",
"Headphone Jack", "HSL",
"Headphone Jack", "HSR",
"MICR", "Internal Mic";
dais = <&mcbsp2_port>, <&mcbsp3_port>;
};
};
&cpu_thermal {
polling-delay = <10000>; /* milliseconds */
};
&cpu_alert0 {
temperature = <80000>; /* millicelsius */
};
&cpu0 {
/*
* Note that the 1.2GiHz mode is enabled for all SoC variants for
* the Motorola Android Linux v3.0.8 based kernel.
*/
operating-points = <
/* kHz uV */
300000 1025000
600000 1200000
800000 1313000
1008000 1375000
1200000 1375000
>;
};
&dss {
status = "okay";
};
&hdmi {
status = "okay";
pinctrl-0 = <&dss_hdmi_pins>;
pinctrl-names = "default";
vdda-supply = <&vdac>;
port {
hdmi_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
lanes = <1 0 3 2 5 4 7 6>;
};
};
};
&i2c1 {
tmp105@48 {
compatible = "ti,tmp105";
reg = <0x48>;
pinctrl-0 = <&tmp105_irq>;
pinctrl-names = "default";
/* kpd_row0.gpio_178 */
interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
&omap4_pmx_core 0x14e>;
interrupt-names = "irq", "wakeup";
wakeup-source;
};
};
&mmc1 {
vmmc-supply = <&vwlan2>;
bus-width = <4>;
cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio176 */
};
&mmc2 {
vmmc-supply = <&vsdio>;
bus-width = <8>;
ti,non-removable;
};
&mmc3 {
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins>;
vmmc-supply = <&wl12xx_vmmc>;
/* uart2_tx.sdmmc3_dat1 pad as wakeirq */
interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0xde>;
interrupt-names = "irq", "wakeup";
non-removable;
bus-width = <4>;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1285";
reg = <2>;
/* gpio_100 with gpmc_wait2 pad as wakeirq */
interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
<&omap4_pmx_core 0x4e>;
interrupt-names = "irq", "wakeup";
ref-clock-frequency = <26000000>;
tcxo-clock-frequency = <26000000>;
};
};
&omap4_pmx_core {
/* hdmi_hpd.gpio_63 */
hdmi_hpd_gpio: hdmi-hpd-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
>;
};
/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
dss_hdmi_pins: dss-hdmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
>;
};
/*
* Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
* for gpio_100, but the internal pull makes wlan flakey on some
* devices. Off mode value should be tested if we have off mode working
* later on.
*/
mmc3_pins: mmc3-pins {
pinctrl-single,pins = <
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
>;
};
/* gpmc_ncs0.gpio_50 */
poweroff_gpio: poweroff-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
>;
};
/* kpd_row0.gpio_178 */
tmp105_irq: tmp105-irq-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_gpio_mux_sel1: usb-gpio-mux-sel1-pins {
/* gpio_60 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
>;
};
usb_ulpi_pins: usb-ulpi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
>;
};
/* usb0_otg_dp and usb0_otg_dm */
usb_utmi_pins: usb-utmi-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
/*
* Note that the v3.0.8 stock userspace dynamically remuxes uart1
* rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
* when not used. If needed, we can add rts pin remux later based
* on power measurements.
*/
uart1_pins: uart1-pins {
pinctrl-single,pins = <
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
OMAP4_IOPAD(0x13e, MUX_MODE1)
/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
>;
};
/* uart3_tx_irtx and uart3_rx_irrx */
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
OMAP4_IOPAD(0x198, MUX_MODE7)
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1ba, MUX_MODE2)
OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
uart4_pins: uart4-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */
OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
>;
};
mcbsp2_pins: mcbsp2-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */
OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
>;
};
mcbsp3_pins: mcbsp3-pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
>;
};
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: usb-gpio-mux-sel2-pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
};
/* RNG is used by secure mode and not accessible */
&rng_target {
status = "disabled";
};
/*
* The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
* for wake-up events for both the USB PHY and the UART. We can use gpio_149
* pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
* have gpio_149 trigger before the UART transfer starts.
*/
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0x110>;
uart-has-rtscts;
current-speed = <115200>;
};
&uart3 {
interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0x17c>;
overrun-throttle-ms = <500>;
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
bluetooth {
compatible = "ti,wl1285-st";
enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */
max-speed = <3686400>;
};
};
/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
&usb_otg_hs {
interface-type = <1>;
mode = <3>;
/*
* Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4.
* VBUS Regulator Main Characteristics". Binding uses 2 mA units.
*/
power = <150>;
};
&mcbsp2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
status = "okay";
mcbsp2_port: port {
cpu_dai2: endpoint {
dai-format = "i2s";
remote-endpoint = <&cpcap_audio_codec0>;
frame-master = <&cpcap_audio_codec0>;
bitclock-master = <&cpcap_audio_codec0>;
};
};
};
&mcbsp3 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp3_pins>;
status = "okay";
mcbsp3_port: port {
cpu_dai3: endpoint {
dai-format = "dsp_a";
frame-master = <&cpcap_audio_codec1>;
bitclock-master = <&cpcap_audio_codec1>;
remote-endpoint = <&cpcap_audio_codec1>;
};
};
};
&cpcap_audio_codec0 {
remote-endpoint = <&cpu_dai2>;
};
&cpcap_audio_codec1 {
remote-endpoint = <&cpu_dai3>;
};