| # SPDX-License-Identifier: GPL-2.0 |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: ARM AMBA Primecell SP805 Watchdog |
| |
| maintainers: |
| - Viresh Kumar <vireshk@kernel.org> |
| |
| description: |+ |
| The Arm SP805 IP implements a watchdog device, which triggers an interrupt |
| after a configurable time period. If that interrupt has not been serviced |
| when the next interrupt would be triggered, the reset signal is asserted. |
| |
| allOf: |
| - $ref: /schemas/watchdog/watchdog.yaml# |
| |
| # Need a custom select here or 'arm,primecell' will match on lots of nodes |
| select: |
| properties: |
| compatible: |
| contains: |
| const: arm,sp805 |
| required: |
| - compatible |
| |
| properties: |
| compatible: |
| items: |
| - const: arm,sp805 |
| - const: arm,primecell |
| |
| interrupts: |
| maxItems: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| description: | |
| Clocks driving the watchdog timer hardware. The first clock is used |
| for the actual watchdog counter. The second clock drives the register |
| interface. |
| maxItems: 2 |
| |
| clock-names: |
| items: |
| - const: wdog_clk |
| - const: apb_pclk |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| watchdog@66090000 { |
| compatible = "arm,sp805", "arm,primecell"; |
| reg = <0x66090000 0x1000>; |
| interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&wdt_clk>, <&apb_pclk>; |
| clock-names = "wdog_clk", "apb_pclk"; |
| }; |