| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Device Tree file for the AM62P5-SK |
| * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ |
| * |
| * Schematics: https://www.ti.com/lit/zip/sprr487 |
| */ |
| |
| /dts-v1/; |
| |
| #include "k3-am62p5.dtsi" |
| |
| / { |
| compatible = "ti,am62p5-sk", "ti,am62p5"; |
| model = "Texas Instruments AM62P5 SK"; |
| |
| aliases { |
| serial0 = &wkup_uart0; |
| serial2 = &main_uart0; |
| serial3 = &main_uart1; |
| }; |
| |
| chosen { |
| stdout-path = &main_uart0; |
| }; |
| |
| memory@80000000 { |
| /* 8G RAM */ |
| reg = <0x00000000 0x80000000 0x00000000 0x80000000>, |
| <0x00000008 0x80000000 0x00000001 0x80000000>; |
| device_type = "memory"; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| secure_tfa_ddr: tfa@9e780000 { |
| reg = <0x00 0x9e780000 0x00 0x80000>; |
| no-map; |
| }; |
| |
| secure_ddr: optee@9e800000 { |
| reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ |
| no-map; |
| }; |
| |
| wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { |
| compatible = "shared-dma-pool"; |
| reg = <0x00 0x9c900000 0x00 0x01e00000>; |
| no-map; |
| }; |
| }; |
| }; |
| |
| &main_pmx0 { |
| main_uart0_pins_default: main-uart0-default-pins { |
| bootph-all; |
| pinctrl-single,pins = < |
| AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ |
| AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ |
| AM62PX_IOPAD(0x1d0, PIN_INPUT, 0) /* (A23) UART0_CTSn */ |
| AM62PX_IOPAD(0x1d4, PIN_OUTPUT, 0) /* (C22) UART0_RTSn */ |
| >; |
| }; |
| |
| main_uart1_pins_default: main-uart1-default-pins { |
| bootph-all; |
| pinctrl-single,pins = < |
| AM62PX_IOPAD(0x194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3 */ |
| AM62PX_IOPAD(0x198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2 */ |
| AM62PX_IOPAD(0x1ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR */ |
| AM62PX_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR */ |
| >; |
| }; |
| }; |
| |
| &main_uart0 { |
| bootph-all; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_uart0_pins_default>; |
| status = "okay"; |
| }; |
| |
| &main_uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_uart1_pins_default>; |
| /* Main UART1 is used by TIFS firmware */ |
| status = "reserved"; |
| }; |
| |
| &cbass_mcu { |
| bootph-all; |
| }; |
| |
| &mcu_pmx0 { |
| bootph-all; |
| wkup_uart0_pins_default: wkup-uart0-default-pins { |
| bootph-all; |
| pinctrl-single,pins = < |
| AM62PX_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ |
| AM62PX_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ |
| AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ |
| AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ |
| >; |
| }; |
| }; |
| |
| &wkup_uart0 { |
| /* WKUP UART0 is used by DM firmware */ |
| bootph-all; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_uart0_pins_default>; |
| status = "reserved"; |
| }; |