| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| # Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/amlogic,s4-pll-clkc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Amlogic S4 PLL Clock Controller |
| |
| maintainers: |
| - Yu Tu <yu.tu@amlogic.com> |
| |
| properties: |
| compatible: |
| const: amlogic,s4-pll-clkc |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: xtal |
| |
| "#clock-cells": |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - "#clock-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| clkc_pll: clock-controller@fe008000 { |
| compatible = "amlogic,s4-pll-clkc"; |
| reg = <0xfe008000 0x1e8>; |
| clocks = <&xtal>; |
| clock-names = "xtal"; |
| #clock-cells = <1>; |
| }; |
| |
| ... |