| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner H3 Deinterlace |
| |
| maintainers: |
| - Jernej Skrabec <jernej.skrabec@siol.net> |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| description: |- |
| The Allwinner H3 and later has a deinterlace core used for |
| deinterlacing interlaced video content. |
| |
| properties: |
| compatible: |
| oneOf: |
| - const: allwinner,sun8i-h3-deinterlace |
| - items: |
| - const: allwinner,sun8i-r40-deinterlace |
| - const: allwinner,sun8i-h3-deinterlace |
| - items: |
| - const: allwinner,sun50i-a64-deinterlace |
| - const: allwinner,sun8i-h3-deinterlace |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Deinterlace interface clock |
| - description: Deinterlace module clock |
| - description: Deinterlace DRAM clock |
| |
| clock-names: |
| items: |
| - const: bus |
| - const: mod |
| - const: ram |
| |
| resets: |
| maxItems: 1 |
| |
| interconnects: |
| maxItems: 1 |
| |
| interconnect-names: |
| const: dma-mem |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/sun8i-h3-ccu.h> |
| #include <dt-bindings/reset/sun8i-h3-ccu.h> |
| |
| deinterlace: deinterlace@1400000 { |
| compatible = "allwinner,sun8i-h3-deinterlace"; |
| reg = <0x01400000 0x20000>; |
| clocks = <&ccu CLK_BUS_DEINTERLACE>, |
| <&ccu CLK_DEINTERLACE>, |
| <&ccu CLK_DRAM_DEINTERLACE>; |
| clock-names = "bus", "mod", "ram"; |
| resets = <&ccu RST_BUS_DEINTERLACE>; |
| interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; |
| interconnects = <&mbus 9>; |
| interconnect-names = "dma-mem"; |
| }; |
| |
| ... |
