blob: 971734085d512ec8bc7171b401e96198bee107d5 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar)
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Sibi Sankar <quic_sibis@quicinc.com>
description:
MSS Peripheral Image Loader loads and boots firmware on the
Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar).
properties:
compatible:
enum:
- qcom,msm8996-mss-pil
- qcom,msm8998-mss-pil
- qcom,sdm660-mss-pil
- qcom,sdm845-mss-pil
reg:
items:
- description: MSS QDSP6 registers
- description: RMB registers
reg-names:
items:
- const: qdsp6
- const: rmb
iommus:
items:
- description: MSA Stream 1
- description: MSA Stream 2
interrupts:
items:
- description: Watchdog interrupt
- description: Fatal interrupt
- description: Ready interrupt
- description: Handover interrupt
- description: Stop acknowledge interrupt
- description: Shutdown acknowledge interrupt
interrupt-names:
items:
- const: wdog
- const: fatal
- const: ready
- const: handover
- const: stop-ack
- const: shutdown-ack
clocks:
minItems: 8
maxItems: 9
clock-names:
minItems: 8
maxItems: 9
power-domains:
items:
- description: CX power domain
- description: MX power domain
- description: MSS power domain (only valid for qcom,sdm845-mss-pil)
minItems: 2
power-domain-names:
items:
- const: cx
- const: mx
- const: mss # only valid for qcom,sdm845-mss-pil
minItems: 2
pll-supply:
description: PLL supply
resets:
items:
- description: AOSS restart
- description: PDC reset (only valid for qcom,sdm845-mss-pil)
minItems: 1
reset-names:
items:
- const: mss_restart
- const: pdc_reset # only valid for qcom,sdm845-mss-pil
minItems: 1
qcom,qmp:
$ref: /schemas/types.yaml#/definitions/phandle
description: Reference to the AOSS side-channel message RAM.
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: States used by the AP to signal the Hexagon core
items:
- description: Stop modem
qcom,smem-state-names:
description: Names of the states used by the AP to signal the Hexagon core
items:
- const: stop
qcom,halt-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Halt registers are used to halt transactions of various sub-components
within MSS.
items:
- items:
- description: phandle to TCSR syscon region
- description: offset to the Q6 halt register
- description: offset to the modem halt register
- description: offset to the nc halt register
memory-region:
items:
- description: MBA reserved region
- description: Modem reserved region
- description: Metadata reserved region
firmware-name:
$ref: /schemas/types.yaml#/definitions/string-array
items:
- description: Name of MBA firmware
- description: Name of modem firmware
smd-edge:
$ref: /schemas/remoteproc/qcom,smd-edge.yaml#
description:
Qualcomm Shared Memory subnode which represents communication edge,
channels and devices related to the Modem.
unevaluatedProperties: false
glink-edge:
$ref: /schemas/remoteproc/qcom,glink-edge.yaml#
description:
Qualcomm G-Link subnode which represents communication edge, channels
and devices related to the Modem.
unevaluatedProperties: false
# Deprecated properties
mba:
type: object
description:
MBA reserved region
properties:
memory-region: true
required:
- memory-region
additionalProperties: false
deprecated: true
mpss:
type: object
description:
MPSS reserved region
properties:
memory-region: true
required:
- memory-region
additionalProperties: false
deprecated: true
metadata:
type: object
description:
Metadata reserved region
properties:
memory-region: true
required:
- memory-region
additionalProperties: false
deprecated: true
required:
- compatible
- reg
- reg-names
- interrupts
- interrupt-names
- clocks
- clock-names
- power-domains
- power-domain-names
- resets
- reset-names
- qcom,halt-regs
- qcom,smem-states
- qcom,smem-state-names
allOf:
- if:
properties:
compatible:
const: qcom,msm8996-mss-pil
then:
properties:
clocks:
items:
- description: GCC MSS IFACE clock
- description: GCC MSS BUS clock
- description: GCC MSS MEM clock
- description: RPM XO clock
- description: GCC MSS GPLL0 clock
- description: GCC MSS SNOC_AXI clock
- description: GCC MSS MNOC_AXI clock
- description: RPM QDSS clock
clock-names:
items:
- const: iface
- const: bus
- const: mem
- const: xo
- const: gpll0_mss
- const: snoc_axi
- const: mnoc_axi
- const: qdss
glink-edge: false
required:
- pll-supply
- smd-edge
else:
properties:
pll-supply: false
smd-edge: false
- if:
properties:
compatible:
enum:
- qcom,msm8998-mss-pil
- qcom,sdm660-mss-pil
then:
properties:
clocks:
items:
- description: GCC MSS IFACE clock
- description: GCC MSS BUS clock
- description: GCC MSS MEM clock
- description: GCC MSS GPLL0 clock
- description: GCC MSS SNOC_AXI clock
- description: GCC MSS MNOC_AXI clock
- description: RPMH QDSS clock
- description: RPMH XO clock
clock-names:
items:
- const: iface
- const: bus
- const: mem
- const: gpll0_mss
- const: snoc_axi
- const: mnoc_axi
- const: qdss
- const: xo
required:
- glink-edge
- if:
properties:
compatible:
const: qcom,sdm845-mss-pil
then:
properties:
power-domains:
minItems: 3
power-domain-names:
minItems: 3
resets:
minItems: 2
reset-names:
minItems: 2
clocks:
items:
- description: GCC MSS IFACE clock
- description: GCC MSS BUS clock
- description: GCC MSS MEM clock
- description: GCC MSS GPLL0 clock
- description: GCC MSS SNOC_AXI clock
- description: GCC MSS MNOC_AXI clock
- description: GCC MSS PRNG clock
- description: RPMH XO clock
clock-names:
items:
- const: iface
- const: bus
- const: mem
- const: gpll0_mss
- const: snoc_axi
- const: mnoc_axi
- const: prng
- const: xo
required:
- qcom,qmp
- glink-edge
else:
properties:
iommus: false
power-domains:
maxItems: 2
power-domain-names:
maxItems: 2
resets:
maxItems: 1
reset-names:
maxItems: 1
qcom,qmp: false
# Fallbacks for deprecated properties
- oneOf:
- required:
- memory-region
- required:
- mba
- mpss
- metadata
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
remoteproc@4080000 {
compatible = "qcom,sdm845-mss-pil";
reg = <0x04080000 0x408>, <0x04180000 0x48>;
reg-names = "qdsp6", "rmb";
interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack",
"shutdown-ack";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_BOOT_ROM_AHB_CLK>,
<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&gcc GCC_PRNG_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "mem", "gpll0_mss",
"snoc_axi", "mnoc_axi", "prng", "xo";
power-domains = <&rpmhpd SDM845_CX>,
<&rpmhpd SDM845_MX>,
<&rpmhpd SDM845_MSS>;
power-domain-names = "cx", "mx", "mss";
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
glink-edge {
interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
label = "modem";
qcom,remote-pid = <1>;
mboxes = <&apss_shared 12>;
};
};