| /* SPDX-License-Identifier: MIT */ |
| /* |
| * Copyright © 2014-2021 Intel Corporation |
| */ |
| |
| #ifndef _ABI_GUC_ACTIONS_ABI_H |
| #define _ABI_GUC_ACTIONS_ABI_H |
| |
| enum intel_guc_action { |
| INTEL_GUC_ACTION_DEFAULT = 0x0, |
| INTEL_GUC_ACTION_REQUEST_PREEMPTION = 0x2, |
| INTEL_GUC_ACTION_REQUEST_ENGINE_RESET = 0x3, |
| INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10, |
| INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, |
| INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, |
| INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x40, |
| INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, |
| INTEL_GUC_ACTION_ENTER_S_STATE = 0x501, |
| INTEL_GUC_ACTION_EXIT_S_STATE = 0x502, |
| INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003, |
| INTEL_GUC_ACTION_AUTHENTICATE_HUC = 0x4000, |
| INTEL_GUC_ACTION_REGISTER_COMMAND_TRANSPORT_BUFFER = 0x4505, |
| INTEL_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER = 0x4506, |
| INTEL_GUC_ACTION_LIMIT |
| }; |
| |
| enum intel_guc_preempt_options { |
| INTEL_GUC_PREEMPT_OPTION_DROP_WORK_Q = 0x4, |
| INTEL_GUC_PREEMPT_OPTION_DROP_SUBMIT_Q = 0x8, |
| }; |
| |
| enum intel_guc_report_status { |
| INTEL_GUC_REPORT_STATUS_UNKNOWN = 0x0, |
| INTEL_GUC_REPORT_STATUS_ACKED = 0x1, |
| INTEL_GUC_REPORT_STATUS_ERROR = 0x2, |
| INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4, |
| }; |
| |
| enum intel_guc_sleep_state_status { |
| INTEL_GUC_SLEEP_STATE_SUCCESS = 0x1, |
| INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x2, |
| INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x3 |
| #define INTEL_GUC_SLEEP_STATE_INVALID_MASK 0x80000000 |
| }; |
| |
| #define GUC_LOG_CONTROL_LOGGING_ENABLED (1 << 0) |
| #define GUC_LOG_CONTROL_VERBOSITY_SHIFT 4 |
| #define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT) |
| #define GUC_LOG_CONTROL_DEFAULT_LOGGING (1 << 8) |
| |
| #endif /* _ABI_GUC_ACTIONS_ABI_H */ |
