| # SPDX-License-Identifier: GPL-2.0 |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner A20 GMAC TX Clock |
| |
| maintainers: |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| properties: |
| "#clock-cells": |
| const: 0 |
| |
| compatible: |
| const: allwinner,sun7i-a20-gmac-clk |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 2 |
| description: > |
| The parent clocks shall be fixed rate dummy clocks at 25 MHz and |
| 125 MHz, respectively. |
| |
| clock-output-names: |
| maxItems: 1 |
| |
| required: |
| - "#clock-cells" |
| - compatible |
| - reg |
| - clocks |
| - clock-output-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| clk@1c20164 { |
| #clock-cells = <0>; |
| compatible = "allwinner,sun7i-a20-gmac-clk"; |
| reg = <0x01c20164 0x4>; |
| clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; |
| clock-output-names = "gmac_tx"; |
| }; |
| |
| ... |